celox 0.4.1

Celox HDL Simulator
Documentation 
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24

---
source: crates/celox/tests/basic.rs
expression: output
---
=== Evaluation Flip-Flops (eval_apply_ffs) ===

=== Evaluation Flip-Flops (eval_only_ffs) ===

=== Application Flip-Flops (apply_ffs) ===

=== Evaluation Combinational Logic (eval_comb) ===
Execution Unit 0:
  Entry Block: 0
  Registers:
    r0: logic<32>
    r1: logic<32>
    r2: logic<32>
  b0:
    r0 = Load(addr=x (region=0), offset=0, bits=32)
    r1 = Load(addr=y (region=0), offset=0, bits=32)
    r2 = r0 Add r1
    Store(addr=z (region=0), offset=0, bits=32, src_reg = 2)
    Store(addr=temp (region=0), offset=0, bits=32, src_reg = 2)
    Return