cc430f5137 0.1.0

Peripheral access API for CC430F5137 microcontroller
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#[doc = "Register `P1SEL` reader"]
pub type R = crate::R<P1selSpec>;
#[doc = "Register `P1SEL` writer"]
pub type W = crate::W<P1selSpec>;
#[doc = "Field `P1SEL0` reader - P1SEL0"]
pub type P1sel0R = crate::BitReader;
#[doc = "Field `P1SEL0` writer - P1SEL0"]
pub type P1sel0W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `P1SEL1` reader - P1SEL1"]
pub type P1sel1R = crate::BitReader;
#[doc = "Field `P1SEL1` writer - P1SEL1"]
pub type P1sel1W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `P1SEL2` reader - P1SEL2"]
pub type P1sel2R = crate::BitReader;
#[doc = "Field `P1SEL2` writer - P1SEL2"]
pub type P1sel2W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `P1SEL3` reader - P1SEL3"]
pub type P1sel3R = crate::BitReader;
#[doc = "Field `P1SEL3` writer - P1SEL3"]
pub type P1sel3W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `P1SEL4` reader - P1SEL4"]
pub type P1sel4R = crate::BitReader;
#[doc = "Field `P1SEL4` writer - P1SEL4"]
pub type P1sel4W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `P1SEL5` reader - P1SEL5"]
pub type P1sel5R = crate::BitReader;
#[doc = "Field `P1SEL5` writer - P1SEL5"]
pub type P1sel5W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `P1SEL6` reader - P1SEL6"]
pub type P1sel6R = crate::BitReader;
#[doc = "Field `P1SEL6` writer - P1SEL6"]
pub type P1sel6W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `P1SEL7` reader - P1SEL7"]
pub type P1sel7R = crate::BitReader;
#[doc = "Field `P1SEL7` writer - P1SEL7"]
pub type P1sel7W<'a, REG> = crate::BitWriter<'a, REG>;
impl R {
    #[doc = "Bit 0 - P1SEL0"]
    #[inline(always)]
    pub fn p1sel0(&self) -> P1sel0R {
        P1sel0R::new((self.bits & 1) != 0)
    }
    #[doc = "Bit 1 - P1SEL1"]
    #[inline(always)]
    pub fn p1sel1(&self) -> P1sel1R {
        P1sel1R::new(((self.bits >> 1) & 1) != 0)
    }
    #[doc = "Bit 2 - P1SEL2"]
    #[inline(always)]
    pub fn p1sel2(&self) -> P1sel2R {
        P1sel2R::new(((self.bits >> 2) & 1) != 0)
    }
    #[doc = "Bit 3 - P1SEL3"]
    #[inline(always)]
    pub fn p1sel3(&self) -> P1sel3R {
        P1sel3R::new(((self.bits >> 3) & 1) != 0)
    }
    #[doc = "Bit 4 - P1SEL4"]
    #[inline(always)]
    pub fn p1sel4(&self) -> P1sel4R {
        P1sel4R::new(((self.bits >> 4) & 1) != 0)
    }
    #[doc = "Bit 5 - P1SEL5"]
    #[inline(always)]
    pub fn p1sel5(&self) -> P1sel5R {
        P1sel5R::new(((self.bits >> 5) & 1) != 0)
    }
    #[doc = "Bit 6 - P1SEL6"]
    #[inline(always)]
    pub fn p1sel6(&self) -> P1sel6R {
        P1sel6R::new(((self.bits >> 6) & 1) != 0)
    }
    #[doc = "Bit 7 - P1SEL7"]
    #[inline(always)]
    pub fn p1sel7(&self) -> P1sel7R {
        P1sel7R::new(((self.bits >> 7) & 1) != 0)
    }
}
impl W {
    #[doc = "Bit 0 - P1SEL0"]
    #[inline(always)]
    pub fn p1sel0(&mut self) -> P1sel0W<'_, P1selSpec> {
        P1sel0W::new(self, 0)
    }
    #[doc = "Bit 1 - P1SEL1"]
    #[inline(always)]
    pub fn p1sel1(&mut self) -> P1sel1W<'_, P1selSpec> {
        P1sel1W::new(self, 1)
    }
    #[doc = "Bit 2 - P1SEL2"]
    #[inline(always)]
    pub fn p1sel2(&mut self) -> P1sel2W<'_, P1selSpec> {
        P1sel2W::new(self, 2)
    }
    #[doc = "Bit 3 - P1SEL3"]
    #[inline(always)]
    pub fn p1sel3(&mut self) -> P1sel3W<'_, P1selSpec> {
        P1sel3W::new(self, 3)
    }
    #[doc = "Bit 4 - P1SEL4"]
    #[inline(always)]
    pub fn p1sel4(&mut self) -> P1sel4W<'_, P1selSpec> {
        P1sel4W::new(self, 4)
    }
    #[doc = "Bit 5 - P1SEL5"]
    #[inline(always)]
    pub fn p1sel5(&mut self) -> P1sel5W<'_, P1selSpec> {
        P1sel5W::new(self, 5)
    }
    #[doc = "Bit 6 - P1SEL6"]
    #[inline(always)]
    pub fn p1sel6(&mut self) -> P1sel6W<'_, P1selSpec> {
        P1sel6W::new(self, 6)
    }
    #[doc = "Bit 7 - P1SEL7"]
    #[inline(always)]
    pub fn p1sel7(&mut self) -> P1sel7W<'_, P1selSpec> {
        P1sel7W::new(self, 7)
    }
}
#[doc = "Port 1 Selection\n\nYou can [`read`](crate::Reg::read) this register and get [`p1sel::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`p1sel::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
pub struct P1selSpec;
impl crate::RegisterSpec for P1selSpec {
    type Ux = u8;
}
#[doc = "`read()` method returns [`p1sel::R`](R) reader structure"]
impl crate::Readable for P1selSpec {}
#[doc = "`write(|w| ..)` method takes [`p1sel::W`](W) writer structure"]
impl crate::Writable for P1selSpec {
    type Safety = crate::Safe;
}
#[doc = "`reset()` method sets P1SEL to value 0"]
impl crate::Resettable for P1selSpec {}