cc430f5137 0.1.0

Peripheral access API for CC430F5137 microcontroller
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#[doc = "Register `P1IFG` reader"]
pub type R = crate::R<P1ifgSpec>;
#[doc = "Register `P1IFG` writer"]
pub type W = crate::W<P1ifgSpec>;
#[doc = "Field `P1IFG0` reader - P1IFG0"]
pub type P1ifg0R = crate::BitReader;
#[doc = "Field `P1IFG0` writer - P1IFG0"]
pub type P1ifg0W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `P1IFG1` reader - P1IFG1"]
pub type P1ifg1R = crate::BitReader;
#[doc = "Field `P1IFG1` writer - P1IFG1"]
pub type P1ifg1W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `P1IFG2` reader - P1IFG2"]
pub type P1ifg2R = crate::BitReader;
#[doc = "Field `P1IFG2` writer - P1IFG2"]
pub type P1ifg2W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `P1IFG3` reader - P1IFG3"]
pub type P1ifg3R = crate::BitReader;
#[doc = "Field `P1IFG3` writer - P1IFG3"]
pub type P1ifg3W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `P1IFG4` reader - P1IFG4"]
pub type P1ifg4R = crate::BitReader;
#[doc = "Field `P1IFG4` writer - P1IFG4"]
pub type P1ifg4W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `P1IFG5` reader - P1IFG5"]
pub type P1ifg5R = crate::BitReader;
#[doc = "Field `P1IFG5` writer - P1IFG5"]
pub type P1ifg5W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `P1IFG6` reader - P1IFG6"]
pub type P1ifg6R = crate::BitReader;
#[doc = "Field `P1IFG6` writer - P1IFG6"]
pub type P1ifg6W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `P1IFG7` reader - P1IFG7"]
pub type P1ifg7R = crate::BitReader;
#[doc = "Field `P1IFG7` writer - P1IFG7"]
pub type P1ifg7W<'a, REG> = crate::BitWriter<'a, REG>;
impl R {
    #[doc = "Bit 0 - P1IFG0"]
    #[inline(always)]
    pub fn p1ifg0(&self) -> P1ifg0R {
        P1ifg0R::new((self.bits & 1) != 0)
    }
    #[doc = "Bit 1 - P1IFG1"]
    #[inline(always)]
    pub fn p1ifg1(&self) -> P1ifg1R {
        P1ifg1R::new(((self.bits >> 1) & 1) != 0)
    }
    #[doc = "Bit 2 - P1IFG2"]
    #[inline(always)]
    pub fn p1ifg2(&self) -> P1ifg2R {
        P1ifg2R::new(((self.bits >> 2) & 1) != 0)
    }
    #[doc = "Bit 3 - P1IFG3"]
    #[inline(always)]
    pub fn p1ifg3(&self) -> P1ifg3R {
        P1ifg3R::new(((self.bits >> 3) & 1) != 0)
    }
    #[doc = "Bit 4 - P1IFG4"]
    #[inline(always)]
    pub fn p1ifg4(&self) -> P1ifg4R {
        P1ifg4R::new(((self.bits >> 4) & 1) != 0)
    }
    #[doc = "Bit 5 - P1IFG5"]
    #[inline(always)]
    pub fn p1ifg5(&self) -> P1ifg5R {
        P1ifg5R::new(((self.bits >> 5) & 1) != 0)
    }
    #[doc = "Bit 6 - P1IFG6"]
    #[inline(always)]
    pub fn p1ifg6(&self) -> P1ifg6R {
        P1ifg6R::new(((self.bits >> 6) & 1) != 0)
    }
    #[doc = "Bit 7 - P1IFG7"]
    #[inline(always)]
    pub fn p1ifg7(&self) -> P1ifg7R {
        P1ifg7R::new(((self.bits >> 7) & 1) != 0)
    }
}
impl W {
    #[doc = "Bit 0 - P1IFG0"]
    #[inline(always)]
    pub fn p1ifg0(&mut self) -> P1ifg0W<'_, P1ifgSpec> {
        P1ifg0W::new(self, 0)
    }
    #[doc = "Bit 1 - P1IFG1"]
    #[inline(always)]
    pub fn p1ifg1(&mut self) -> P1ifg1W<'_, P1ifgSpec> {
        P1ifg1W::new(self, 1)
    }
    #[doc = "Bit 2 - P1IFG2"]
    #[inline(always)]
    pub fn p1ifg2(&mut self) -> P1ifg2W<'_, P1ifgSpec> {
        P1ifg2W::new(self, 2)
    }
    #[doc = "Bit 3 - P1IFG3"]
    #[inline(always)]
    pub fn p1ifg3(&mut self) -> P1ifg3W<'_, P1ifgSpec> {
        P1ifg3W::new(self, 3)
    }
    #[doc = "Bit 4 - P1IFG4"]
    #[inline(always)]
    pub fn p1ifg4(&mut self) -> P1ifg4W<'_, P1ifgSpec> {
        P1ifg4W::new(self, 4)
    }
    #[doc = "Bit 5 - P1IFG5"]
    #[inline(always)]
    pub fn p1ifg5(&mut self) -> P1ifg5W<'_, P1ifgSpec> {
        P1ifg5W::new(self, 5)
    }
    #[doc = "Bit 6 - P1IFG6"]
    #[inline(always)]
    pub fn p1ifg6(&mut self) -> P1ifg6W<'_, P1ifgSpec> {
        P1ifg6W::new(self, 6)
    }
    #[doc = "Bit 7 - P1IFG7"]
    #[inline(always)]
    pub fn p1ifg7(&mut self) -> P1ifg7W<'_, P1ifgSpec> {
        P1ifg7W::new(self, 7)
    }
}
#[doc = "Port 1 Interrupt Flag\n\nYou can [`read`](crate::Reg::read) this register and get [`p1ifg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`p1ifg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
pub struct P1ifgSpec;
impl crate::RegisterSpec for P1ifgSpec {
    type Ux = u8;
}
#[doc = "`read()` method returns [`p1ifg::R`](R) reader structure"]
impl crate::Readable for P1ifgSpec {}
#[doc = "`write(|w| ..)` method takes [`p1ifg::W`](W) writer structure"]
impl crate::Writable for P1ifgSpec {
    type Safety = crate::Safe;
}
#[doc = "`reset()` method sets P1IFG to value 0"]
impl crate::Resettable for P1ifgSpec {}