cc430f5137 0.1.0

Peripheral access API for CC430F5137 microcontroller
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133

#[doc = "Register `P1REN` reader"]
pub type R = crate::R<P1renSpec>;
#[doc = "Register `P1REN` writer"]
pub type W = crate::W<P1renSpec>;
#[doc = "Field `P1REN0` reader - P1REN0"]
pub type P1ren0R = crate::BitReader;
#[doc = "Field `P1REN0` writer - P1REN0"]
pub type P1ren0W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `P1REN1` reader - P1REN1"]
pub type P1ren1R = crate::BitReader;
#[doc = "Field `P1REN1` writer - P1REN1"]
pub type P1ren1W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `P1REN2` reader - P1REN2"]
pub type P1ren2R = crate::BitReader;
#[doc = "Field `P1REN2` writer - P1REN2"]
pub type P1ren2W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `P1REN3` reader - P1REN3"]
pub type P1ren3R = crate::BitReader;
#[doc = "Field `P1REN3` writer - P1REN3"]
pub type P1ren3W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `P1REN4` reader - P1REN4"]
pub type P1ren4R = crate::BitReader;
#[doc = "Field `P1REN4` writer - P1REN4"]
pub type P1ren4W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `P1REN5` reader - P1REN5"]
pub type P1ren5R = crate::BitReader;
#[doc = "Field `P1REN5` writer - P1REN5"]
pub type P1ren5W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `P1REN6` reader - P1REN6"]
pub type P1ren6R = crate::BitReader;
#[doc = "Field `P1REN6` writer - P1REN6"]
pub type P1ren6W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `P1REN7` reader - P1REN7"]
pub type P1ren7R = crate::BitReader;
#[doc = "Field `P1REN7` writer - P1REN7"]
pub type P1ren7W<'a, REG> = crate::BitWriter<'a, REG>;
impl R {
    #[doc = "Bit 0 - P1REN0"]
    #[inline(always)]
    pub fn p1ren0(&self) -> P1ren0R {
        P1ren0R::new((self.bits & 1) != 0)
    }
    #[doc = "Bit 1 - P1REN1"]
    #[inline(always)]
    pub fn p1ren1(&self) -> P1ren1R {
        P1ren1R::new(((self.bits >> 1) & 1) != 0)
    }
    #[doc = "Bit 2 - P1REN2"]
    #[inline(always)]
    pub fn p1ren2(&self) -> P1ren2R {
        P1ren2R::new(((self.bits >> 2) & 1) != 0)
    }
    #[doc = "Bit 3 - P1REN3"]
    #[inline(always)]
    pub fn p1ren3(&self) -> P1ren3R {
        P1ren3R::new(((self.bits >> 3) & 1) != 0)
    }
    #[doc = "Bit 4 - P1REN4"]
    #[inline(always)]
    pub fn p1ren4(&self) -> P1ren4R {
        P1ren4R::new(((self.bits >> 4) & 1) != 0)
    }
    #[doc = "Bit 5 - P1REN5"]
    #[inline(always)]
    pub fn p1ren5(&self) -> P1ren5R {
        P1ren5R::new(((self.bits >> 5) & 1) != 0)
    }
    #[doc = "Bit 6 - P1REN6"]
    #[inline(always)]
    pub fn p1ren6(&self) -> P1ren6R {
        P1ren6R::new(((self.bits >> 6) & 1) != 0)
    }
    #[doc = "Bit 7 - P1REN7"]
    #[inline(always)]
    pub fn p1ren7(&self) -> P1ren7R {
        P1ren7R::new(((self.bits >> 7) & 1) != 0)
    }
}
impl W {
    #[doc = "Bit 0 - P1REN0"]
    #[inline(always)]
    pub fn p1ren0(&mut self) -> P1ren0W<'_, P1renSpec> {
        P1ren0W::new(self, 0)
    }
    #[doc = "Bit 1 - P1REN1"]
    #[inline(always)]
    pub fn p1ren1(&mut self) -> P1ren1W<'_, P1renSpec> {
        P1ren1W::new(self, 1)
    }
    #[doc = "Bit 2 - P1REN2"]
    #[inline(always)]
    pub fn p1ren2(&mut self) -> P1ren2W<'_, P1renSpec> {
        P1ren2W::new(self, 2)
    }
    #[doc = "Bit 3 - P1REN3"]
    #[inline(always)]
    pub fn p1ren3(&mut self) -> P1ren3W<'_, P1renSpec> {
        P1ren3W::new(self, 3)
    }
    #[doc = "Bit 4 - P1REN4"]
    #[inline(always)]
    pub fn p1ren4(&mut self) -> P1ren4W<'_, P1renSpec> {
        P1ren4W::new(self, 4)
    }
    #[doc = "Bit 5 - P1REN5"]
    #[inline(always)]
    pub fn p1ren5(&mut self) -> P1ren5W<'_, P1renSpec> {
        P1ren5W::new(self, 5)
    }
    #[doc = "Bit 6 - P1REN6"]
    #[inline(always)]
    pub fn p1ren6(&mut self) -> P1ren6W<'_, P1renSpec> {
        P1ren6W::new(self, 6)
    }
    #[doc = "Bit 7 - P1REN7"]
    #[inline(always)]
    pub fn p1ren7(&mut self) -> P1ren7W<'_, P1renSpec> {
        P1ren7W::new(self, 7)
    }
}
#[doc = "Port 1 Resistor Enable\n\nYou can [`read`](crate::Reg::read) this register and get [`p1ren::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`p1ren::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
pub struct P1renSpec;
impl crate::RegisterSpec for P1renSpec {
    type Ux = u8;
}
#[doc = "`read()` method returns [`p1ren::R`](R) reader structure"]
impl crate::Readable for P1renSpec {}
#[doc = "`write(|w| ..)` method takes [`p1ren::W`](W) writer structure"]
impl crate::Writable for P1renSpec {
    type Safety = crate::Safe;
}
#[doc = "`reset()` method sets P1REN to value 0"]
impl crate::Resettable for P1renSpec {}