cc430f5137 0.1.0

Peripheral access API for CC430F5137 microcontroller
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#[doc = "Register `DMACTL4` reader"]
pub type R = crate::R<Dmactl4Spec>;
#[doc = "Register `DMACTL4` writer"]
pub type W = crate::W<Dmactl4Spec>;
#[doc = "Field `ENNMI` reader - Enable NMI interruption of DMA"]
pub type EnnmiR = crate::BitReader;
#[doc = "Field `ENNMI` writer - Enable NMI interruption of DMA"]
pub type EnnmiW<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `ROUNDROBIN` reader - Round-Robin DMA channel priorities"]
pub type RoundrobinR = crate::BitReader;
#[doc = "Field `ROUNDROBIN` writer - Round-Robin DMA channel priorities"]
pub type RoundrobinW<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `DMARMWDIS` reader - Inhibited DMA transfers during read-modify-write CPU operations"]
pub type DmarmwdisR = crate::BitReader;
#[doc = "Field `DMARMWDIS` writer - Inhibited DMA transfers during read-modify-write CPU operations"]
pub type DmarmwdisW<'a, REG> = crate::BitWriter<'a, REG>;
impl R {
    #[doc = "Bit 0 - Enable NMI interruption of DMA"]
    #[inline(always)]
    pub fn ennmi(&self) -> EnnmiR {
        EnnmiR::new((self.bits & 1) != 0)
    }
    #[doc = "Bit 1 - Round-Robin DMA channel priorities"]
    #[inline(always)]
    pub fn roundrobin(&self) -> RoundrobinR {
        RoundrobinR::new(((self.bits >> 1) & 1) != 0)
    }
    #[doc = "Bit 2 - Inhibited DMA transfers during read-modify-write CPU operations"]
    #[inline(always)]
    pub fn dmarmwdis(&self) -> DmarmwdisR {
        DmarmwdisR::new(((self.bits >> 2) & 1) != 0)
    }
}
impl W {
    #[doc = "Bit 0 - Enable NMI interruption of DMA"]
    #[inline(always)]
    pub fn ennmi(&mut self) -> EnnmiW<'_, Dmactl4Spec> {
        EnnmiW::new(self, 0)
    }
    #[doc = "Bit 1 - Round-Robin DMA channel priorities"]
    #[inline(always)]
    pub fn roundrobin(&mut self) -> RoundrobinW<'_, Dmactl4Spec> {
        RoundrobinW::new(self, 1)
    }
    #[doc = "Bit 2 - Inhibited DMA transfers during read-modify-write CPU operations"]
    #[inline(always)]
    pub fn dmarmwdis(&mut self) -> DmarmwdisW<'_, Dmactl4Spec> {
        DmarmwdisW::new(self, 2)
    }
}
#[doc = "DMA Module Control 4\n\nYou can [`read`](crate::Reg::read) this register and get [`dmactl4::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dmactl4::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
pub struct Dmactl4Spec;
impl crate::RegisterSpec for Dmactl4Spec {
    type Ux = u16;
}
#[doc = "`read()` method returns [`dmactl4::R`](R) reader structure"]
impl crate::Readable for Dmactl4Spec {}
#[doc = "`write(|w| ..)` method takes [`dmactl4::W`](W) writer structure"]
impl crate::Writable for Dmactl4Spec {
    type Safety = crate::Unsafe;
}
#[doc = "`reset()` method sets DMACTL4 to value 0"]
impl crate::Resettable for Dmactl4Spec {}