calyx 0.7.1

Compiler Infrastructure for Hardware Accelerator Generation
{
  "l0": [
    4,
    6,
    8
  ],
  "l1": [
    7,
    9,
    11
  ],
  "out_mem": [
    760,
    400,
    1120,
    580
  ],
  "t0": [
    30,
    40,
    50
  ],
  "t1": [
    10,
    20,
    30
  ]
}