bender 0.31.0

A dependency management tool for hardware projects.
Documentation 
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# {{HEADER_AUTOGEN}}
set ROOT "{{ root }}"
set search_path_initial $search_path
{% if compilation_mode == 'separate' %}{% for group in srcs %}{% if group.file_type != '' %}{% if source_annotations %}
# {{ group.metadata }}{% endif %}
set search_path $search_path_initial
{% for incdir in group.incdirs %}lappend search_path "$ROOT{{ incdir | replace(from=root, to='') }}"
{% endfor %}
{% if abort_on_error %}if {[catch { {% endif %}{% if group.file_type == 'verilog' %}read_sverilog{% elif group.file_type == 'vhdl' %}read_vhdl{% endif %} -r \
    {% for define in group.defines %}{% if loop.first %}-define { \
        {% endif %}{{ define.0 }}{% if define.1 %}={{ define.1 }}{% endif %}{% if loop.last %} \
    } \
    {% else %} \
        {% endif %}{% endfor %}[list \
    {% for file in group.files %}{% if source_annotations %}{% if file.comment %}{{ '    ' }}# {{ file.comment }}
    {% endif %}{% endif %}{{ '    ' }}"{{ file.file | replace(from=root, to='$ROOT') }}" \
    {% endfor %}]
{% if abort_on_error %}}]} {return 1}{% endif %}
{% endif %}{% endfor %}
{% else %}{# compilation_mode == 'common' #}{% for file in all_verilog %}{% if loop.first %}set search_path $search_path_initial
{% for incdir in all_incdirs %}lappend search_path "$ROOT{{ incdir | replace(from=root, to='') }}"
{% endfor %}
{% if abort_on_error %}if {[catch { {% endif %}read_sverilog -r \
    {% for define in all_defines %}{% if loop.first %}-define { \
        {% endif %}{{ define.0 }}{% if define.1 %}={{ define.1 }}{% endif %}{% if loop.last %} \
    } \
    {% else %} \
        {% endif %}{% endfor %}[list \
    {% endif %}{% if source_annotations %}{% if file.comment %}{{ '    ' }}# {{ file.comment }}
    {% endif %}{% endif %}{{ '    ' }}"{{ file.file | replace(from=root, to='$ROOT') }}" \
    {% if loop.last %}]
{% if abort_on_error %}}]} {return 1}{% endif %}
{% endif %}{% endfor %}
{% for file in all_vhdl %}{% if loop.first %}{% if abort_on_error %}if {[catch { {% endif %}read_vhdl -r \
    [list \
    {% endif %}{% if source_annotations %}{% if file.comment %}{{ '    ' }}# {{ file.comment }}
    {% endif %}{% endif %}{{ '    ' }}"{{ file.file | replace(from=root, to='$ROOT') }}" \
    {% if loop.last %}]
{% if abort_on_error %}}]} {return 1}{% endif %}
{% endif %}{% endfor %}
{% endif %}set search_path $search_path_initial