#[doc = "Writer for register USBHS_HSTIFR"]
pub type W = crate::W<u32, super::USBHS_HSTIFR>;
#[doc = "Register USBHS_HSTIFR `reset()`'s with value 0"]
impl crate::ResetValue for super::USBHS_HSTIFR {
type Type = u32;
#[inline(always)]
fn reset_value() -> Self::Type {
0
}
}
#[doc = "Write proxy for field `DCONNIS`"]
pub struct DCONNIS_W<'a> {
w: &'a mut W,
}
impl<'a> DCONNIS_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01);
self.w
}
}
#[doc = "Write proxy for field `DDISCIS`"]
pub struct DDISCIS_W<'a> {
w: &'a mut W,
}
impl<'a> DDISCIS_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1);
self.w
}
}
#[doc = "Write proxy for field `RSTIS`"]
pub struct RSTIS_W<'a> {
w: &'a mut W,
}
impl<'a> RSTIS_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2);
self.w
}
}
#[doc = "Write proxy for field `RSMEDIS`"]
pub struct RSMEDIS_W<'a> {
w: &'a mut W,
}
impl<'a> RSMEDIS_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u32) & 0x01) << 3);
self.w
}
}
#[doc = "Write proxy for field `RXRSMIS`"]
pub struct RXRSMIS_W<'a> {
w: &'a mut W,
}
impl<'a> RXRSMIS_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 4)) | (((value as u32) & 0x01) << 4);
self.w
}
}
#[doc = "Write proxy for field `HSOFIS`"]
pub struct HSOFIS_W<'a> {
w: &'a mut W,
}
impl<'a> HSOFIS_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 5)) | (((value as u32) & 0x01) << 5);
self.w
}
}
#[doc = "Write proxy for field `HWUPIS`"]
pub struct HWUPIS_W<'a> {
w: &'a mut W,
}
impl<'a> HWUPIS_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 6)) | (((value as u32) & 0x01) << 6);
self.w
}
}
#[doc = "Write proxy for field `DMA_0`"]
pub struct DMA_0_W<'a> {
w: &'a mut W,
}
impl<'a> DMA_0_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 25)) | (((value as u32) & 0x01) << 25);
self.w
}
}
#[doc = "Write proxy for field `DMA_1`"]
pub struct DMA_1_W<'a> {
w: &'a mut W,
}
impl<'a> DMA_1_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 26)) | (((value as u32) & 0x01) << 26);
self.w
}
}
#[doc = "Write proxy for field `DMA_2`"]
pub struct DMA_2_W<'a> {
w: &'a mut W,
}
impl<'a> DMA_2_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 27)) | (((value as u32) & 0x01) << 27);
self.w
}
}
#[doc = "Write proxy for field `DMA_3`"]
pub struct DMA_3_W<'a> {
w: &'a mut W,
}
impl<'a> DMA_3_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 28)) | (((value as u32) & 0x01) << 28);
self.w
}
}
#[doc = "Write proxy for field `DMA_4`"]
pub struct DMA_4_W<'a> {
w: &'a mut W,
}
impl<'a> DMA_4_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 29)) | (((value as u32) & 0x01) << 29);
self.w
}
}
#[doc = "Write proxy for field `DMA_5`"]
pub struct DMA_5_W<'a> {
w: &'a mut W,
}
impl<'a> DMA_5_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 30)) | (((value as u32) & 0x01) << 30);
self.w
}
}
#[doc = "Write proxy for field `DMA_6`"]
pub struct DMA_6_W<'a> {
w: &'a mut W,
}
impl<'a> DMA_6_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 31)) | (((value as u32) & 0x01) << 31);
self.w
}
}
impl W {
#[doc = "Bit 0 - Device Connection Interrupt Set"]
#[inline(always)]
pub fn dconnis(&mut self) -> DCONNIS_W {
DCONNIS_W { w: self }
}
#[doc = "Bit 1 - Device Disconnection Interrupt Set"]
#[inline(always)]
pub fn ddiscis(&mut self) -> DDISCIS_W {
DDISCIS_W { w: self }
}
#[doc = "Bit 2 - USB Reset Sent Interrupt Set"]
#[inline(always)]
pub fn rstis(&mut self) -> RSTIS_W {
RSTIS_W { w: self }
}
#[doc = "Bit 3 - Downstream Resume Sent Interrupt Set"]
#[inline(always)]
pub fn rsmedis(&mut self) -> RSMEDIS_W {
RSMEDIS_W { w: self }
}
#[doc = "Bit 4 - Upstream Resume Received Interrupt Set"]
#[inline(always)]
pub fn rxrsmis(&mut self) -> RXRSMIS_W {
RXRSMIS_W { w: self }
}
#[doc = "Bit 5 - Host Start of Frame Interrupt Set"]
#[inline(always)]
pub fn hsofis(&mut self) -> HSOFIS_W {
HSOFIS_W { w: self }
}
#[doc = "Bit 6 - Host Wake-Up Interrupt Set"]
#[inline(always)]
pub fn hwupis(&mut self) -> HWUPIS_W {
HWUPIS_W { w: self }
}
#[doc = "Bit 25 - DMA Channel 0 Interrupt Set"]
#[inline(always)]
pub fn dma_0(&mut self) -> DMA_0_W {
DMA_0_W { w: self }
}
#[doc = "Bit 26 - DMA Channel 1 Interrupt Set"]
#[inline(always)]
pub fn dma_1(&mut self) -> DMA_1_W {
DMA_1_W { w: self }
}
#[doc = "Bit 27 - DMA Channel 2 Interrupt Set"]
#[inline(always)]
pub fn dma_2(&mut self) -> DMA_2_W {
DMA_2_W { w: self }
}
#[doc = "Bit 28 - DMA Channel 3 Interrupt Set"]
#[inline(always)]
pub fn dma_3(&mut self) -> DMA_3_W {
DMA_3_W { w: self }
}
#[doc = "Bit 29 - DMA Channel 4 Interrupt Set"]
#[inline(always)]
pub fn dma_4(&mut self) -> DMA_4_W {
DMA_4_W { w: self }
}
#[doc = "Bit 30 - DMA Channel 5 Interrupt Set"]
#[inline(always)]
pub fn dma_5(&mut self) -> DMA_5_W {
DMA_5_W { w: self }
}
#[doc = "Bit 31 - DMA Channel 6 Interrupt Set"]
#[inline(always)]
pub fn dma_6(&mut self) -> DMA_6_W {
DMA_6_W { w: self }
}
}