#[doc = "Writer for register USBHS_DEVEPTIDR_ISO_MODE[%s]"]
pub type W = crate::W<u32, super::USBHS_DEVEPTIDR_ISO_MODE>;
#[doc = "Register USBHS_DEVEPTIDR_ISO_MODE[%s]
`reset()`'s with value 0"]
impl crate::ResetValue for super::USBHS_DEVEPTIDR_ISO_MODE {
type Type = u32;
#[inline(always)]
fn reset_value() -> Self::Type {
0
}
}
#[doc = "Write proxy for field `TXINEC`"]
pub struct TXINEC_W<'a> {
w: &'a mut W,
}
impl<'a> TXINEC_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01);
self.w
}
}
#[doc = "Write proxy for field `RXOUTEC`"]
pub struct RXOUTEC_W<'a> {
w: &'a mut W,
}
impl<'a> RXOUTEC_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1);
self.w
}
}
#[doc = "Write proxy for field `UNDERFEC`"]
pub struct UNDERFEC_W<'a> {
w: &'a mut W,
}
impl<'a> UNDERFEC_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2);
self.w
}
}
#[doc = "Write proxy for field `HBISOINERREC`"]
pub struct HBISOINERREC_W<'a> {
w: &'a mut W,
}
impl<'a> HBISOINERREC_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u32) & 0x01) << 3);
self.w
}
}
#[doc = "Write proxy for field `HBISOFLUSHEC`"]
pub struct HBISOFLUSHEC_W<'a> {
w: &'a mut W,
}
impl<'a> HBISOFLUSHEC_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 4)) | (((value as u32) & 0x01) << 4);
self.w
}
}
#[doc = "Write proxy for field `OVERFEC`"]
pub struct OVERFEC_W<'a> {
w: &'a mut W,
}
impl<'a> OVERFEC_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 5)) | (((value as u32) & 0x01) << 5);
self.w
}
}
#[doc = "Write proxy for field `SHORTPACKETEC`"]
pub struct SHORTPACKETEC_W<'a> {
w: &'a mut W,
}
impl<'a> SHORTPACKETEC_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 7)) | (((value as u32) & 0x01) << 7);
self.w
}
}
#[doc = "Write proxy for field `MDATAEC`"]
pub struct MDATAEC_W<'a> {
w: &'a mut W,
}
impl<'a> MDATAEC_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 8)) | (((value as u32) & 0x01) << 8);
self.w
}
}
#[doc = "Write proxy for field `DATAXEC`"]
pub struct DATAXEC_W<'a> {
w: &'a mut W,
}
impl<'a> DATAXEC_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 9)) | (((value as u32) & 0x01) << 9);
self.w
}
}
#[doc = "Write proxy for field `ERRORTRANSEC`"]
pub struct ERRORTRANSEC_W<'a> {
w: &'a mut W,
}
impl<'a> ERRORTRANSEC_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 10)) | (((value as u32) & 0x01) << 10);
self.w
}
}
#[doc = "Write proxy for field `NBUSYBKEC`"]
pub struct NBUSYBKEC_W<'a> {
w: &'a mut W,
}
impl<'a> NBUSYBKEC_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 12)) | (((value as u32) & 0x01) << 12);
self.w
}
}
#[doc = "Write proxy for field `FIFOCONC`"]
pub struct FIFOCONC_W<'a> {
w: &'a mut W,
}
impl<'a> FIFOCONC_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 14)) | (((value as u32) & 0x01) << 14);
self.w
}
}
#[doc = "Write proxy for field `EPDISHDMAC`"]
pub struct EPDISHDMAC_W<'a> {
w: &'a mut W,
}
impl<'a> EPDISHDMAC_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 16)) | (((value as u32) & 0x01) << 16);
self.w
}
}
impl W {
#[doc = "Bit 0 - Transmitted IN Interrupt Clear"]
#[inline(always)]
pub fn txinec(&mut self) -> TXINEC_W {
TXINEC_W { w: self }
}
#[doc = "Bit 1 - Received OUT Data Interrupt Clear"]
#[inline(always)]
pub fn rxoutec(&mut self) -> RXOUTEC_W {
RXOUTEC_W { w: self }
}
#[doc = "Bit 2 - Underflow Interrupt Clear"]
#[inline(always)]
pub fn underfec(&mut self) -> UNDERFEC_W {
UNDERFEC_W { w: self }
}
#[doc = "Bit 3 - High Bandwidth Isochronous IN Underflow Error Interrupt Clear"]
#[inline(always)]
pub fn hbisoinerrec(&mut self) -> HBISOINERREC_W {
HBISOINERREC_W { w: self }
}
#[doc = "Bit 4 - High Bandwidth Isochronous IN Flush Interrupt Clear"]
#[inline(always)]
pub fn hbisoflushec(&mut self) -> HBISOFLUSHEC_W {
HBISOFLUSHEC_W { w: self }
}
#[doc = "Bit 5 - Overflow Interrupt Clear"]
#[inline(always)]
pub fn overfec(&mut self) -> OVERFEC_W {
OVERFEC_W { w: self }
}
#[doc = "Bit 7 - Shortpacket Interrupt Clear"]
#[inline(always)]
pub fn shortpacketec(&mut self) -> SHORTPACKETEC_W {
SHORTPACKETEC_W { w: self }
}
#[doc = "Bit 8 - MData Interrupt Clear"]
#[inline(always)]
pub fn mdataec(&mut self) -> MDATAEC_W {
MDATAEC_W { w: self }
}
#[doc = "Bit 9 - DataX Interrupt Clear"]
#[inline(always)]
pub fn dataxec(&mut self) -> DATAXEC_W {
DATAXEC_W { w: self }
}
#[doc = "Bit 10 - Transaction Error Interrupt Clear"]
#[inline(always)]
pub fn errortransec(&mut self) -> ERRORTRANSEC_W {
ERRORTRANSEC_W { w: self }
}
#[doc = "Bit 12 - Number of Busy Banks Interrupt Clear"]
#[inline(always)]
pub fn nbusybkec(&mut self) -> NBUSYBKEC_W {
NBUSYBKEC_W { w: self }
}
#[doc = "Bit 14 - FIFO Control Clear"]
#[inline(always)]
pub fn fifoconc(&mut self) -> FIFOCONC_W {
FIFOCONC_W { w: self }
}
#[doc = "Bit 16 - Endpoint Interrupts Disable HDMA Request Clear"]
#[inline(always)]
pub fn epdishdmac(&mut self) -> EPDISHDMAC_W {
EPDISHDMAC_W { w: self }
}
}