atsame70j21b 0.0.2

Peripheral access API for ATSAME70J21B microcontrollers from Atmel/Microchip (generated using svd2rust)
Documentation 
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112

#[doc = "Reader of register USBHS_HSTADDR2"]
pub type R = crate::R<u32, super::USBHS_HSTADDR2>;
#[doc = "Writer for register USBHS_HSTADDR2"]
pub type W = crate::W<u32, super::USBHS_HSTADDR2>;
#[doc = "Register USBHS_HSTADDR2 `reset()`'s with value 0"]
impl crate::ResetValue for super::USBHS_HSTADDR2 {
    type Type = u32;
    #[inline(always)]
    fn reset_value() -> Self::Type {
        0
    }
}
#[doc = "Reader of field `HSTADDRP4`"]
pub type HSTADDRP4_R = crate::R<u8, u8>;
#[doc = "Write proxy for field `HSTADDRP4`"]
pub struct HSTADDRP4_W<'a> {
    w: &'a mut W,
}
impl<'a> HSTADDRP4_W<'a> {
    #[doc = r"Writes raw bits to the field"]
    #[inline(always)]
    pub unsafe fn bits(self, value: u8) -> &'a mut W {
        self.w.bits = (self.w.bits & !0x7f) | ((value as u32) & 0x7f);
        self.w
    }
}
#[doc = "Reader of field `HSTADDRP5`"]
pub type HSTADDRP5_R = crate::R<u8, u8>;
#[doc = "Write proxy for field `HSTADDRP5`"]
pub struct HSTADDRP5_W<'a> {
    w: &'a mut W,
}
impl<'a> HSTADDRP5_W<'a> {
    #[doc = r"Writes raw bits to the field"]
    #[inline(always)]
    pub unsafe fn bits(self, value: u8) -> &'a mut W {
        self.w.bits = (self.w.bits & !(0x7f << 8)) | (((value as u32) & 0x7f) << 8);
        self.w
    }
}
#[doc = "Reader of field `HSTADDRP6`"]
pub type HSTADDRP6_R = crate::R<u8, u8>;
#[doc = "Write proxy for field `HSTADDRP6`"]
pub struct HSTADDRP6_W<'a> {
    w: &'a mut W,
}
impl<'a> HSTADDRP6_W<'a> {
    #[doc = r"Writes raw bits to the field"]
    #[inline(always)]
    pub unsafe fn bits(self, value: u8) -> &'a mut W {
        self.w.bits = (self.w.bits & !(0x7f << 16)) | (((value as u32) & 0x7f) << 16);
        self.w
    }
}
#[doc = "Reader of field `HSTADDRP7`"]
pub type HSTADDRP7_R = crate::R<u8, u8>;
#[doc = "Write proxy for field `HSTADDRP7`"]
pub struct HSTADDRP7_W<'a> {
    w: &'a mut W,
}
impl<'a> HSTADDRP7_W<'a> {
    #[doc = r"Writes raw bits to the field"]
    #[inline(always)]
    pub unsafe fn bits(self, value: u8) -> &'a mut W {
        self.w.bits = (self.w.bits & !(0x7f << 24)) | (((value as u32) & 0x7f) << 24);
        self.w
    }
}
impl R {
    #[doc = "Bits 0:6 - USB Host Address"]
    #[inline(always)]
    pub fn hstaddrp4(&self) -> HSTADDRP4_R {
        HSTADDRP4_R::new((self.bits & 0x7f) as u8)
    }
    #[doc = "Bits 8:14 - USB Host Address"]
    #[inline(always)]
    pub fn hstaddrp5(&self) -> HSTADDRP5_R {
        HSTADDRP5_R::new(((self.bits >> 8) & 0x7f) as u8)
    }
    #[doc = "Bits 16:22 - USB Host Address"]
    #[inline(always)]
    pub fn hstaddrp6(&self) -> HSTADDRP6_R {
        HSTADDRP6_R::new(((self.bits >> 16) & 0x7f) as u8)
    }
    #[doc = "Bits 24:30 - USB Host Address"]
    #[inline(always)]
    pub fn hstaddrp7(&self) -> HSTADDRP7_R {
        HSTADDRP7_R::new(((self.bits >> 24) & 0x7f) as u8)
    }
}
impl W {
    #[doc = "Bits 0:6 - USB Host Address"]
    #[inline(always)]
    pub fn hstaddrp4(&mut self) -> HSTADDRP4_W {
        HSTADDRP4_W { w: self }
    }
    #[doc = "Bits 8:14 - USB Host Address"]
    #[inline(always)]
    pub fn hstaddrp5(&mut self) -> HSTADDRP5_W {
        HSTADDRP5_W { w: self }
    }
    #[doc = "Bits 16:22 - USB Host Address"]
    #[inline(always)]
    pub fn hstaddrp6(&mut self) -> HSTADDRP6_W {
        HSTADDRP6_W { w: self }
    }
    #[doc = "Bits 24:30 - USB Host Address"]
    #[inline(always)]
    pub fn hstaddrp7(&mut self) -> HSTADDRP7_W {
        HSTADDRP7_W { w: self }
    }
}