Struct EfuseDriver 

pub struct EfuseDriver<'d> { /* private fields */ }

eFuse controller driver.

Implementations

impl<'d> EfuseDriver<'d>

pub fn new(efuse: Efuse<'d>) -> Self

Create a new eFuse driver.

pub fn set_clock_period(&mut self, period: u8)

Set the eFuse clock period (cycles). The SDK uses 0x29 @ 24 MHz TCXO and 0x19 @ 40 MHz; call before any read/program.

pub fn status(&self) -> EfuseStatus

Read the boot-done status register.

pub fn read_byte(&mut self, byte_addr: u16) -> Result<u8, EfuseError>

Read a single eFuse byte at byte_addr.

Arms read mode (0x5A5A), then loads the latched word from the data window and extracts the requested byte. No delay is required for reads (matches hal_efuse_read_byte).

pub fn read_buffer( &mut self, start_byte: u16, buf: &mut [u8], ) -> Result<(), EfuseError>

Read buf.len() consecutive eFuse bytes starting at start_byte.

pub fn write_byte( &mut self, byte_addr: u16, value: u8, ) -> Result<(), EfuseError>

Program a single eFuse byte (one-time, irreversible).

Sequence (per hal_efuse_write_operation): arm write mode (0xA5A5), raise AVDD, settle, write the packed byte to the window, lower AVDD, settle. eFuse bits can only be burned 0→1; this does not erase.

Not validated on silicon — treat as experimental.