ws63-hal — Hardware Abstraction Layer for HiSilicon WS63 (RISC-V).

A comprehensive HAL providing safe, idiomatic Rust APIs for all WS63 peripherals. Modeled on esp-hal patterns with type-state GPIO, RAII clock guards, DMA typing, and embedded-hal trait implementations.

Clock gating

Most peripherals need their CLDO_CRG clock gate enabled before register access. The gates default to enabled out of reset; clock_init::init_clocks() sets up the system clocks for firmware that does not boot through flashboot. Constructors like I2c::new_i2c0(), Uart::new_uart0(), and Watchdog::new() write configuration registers immediately. WDT/RTC/TCXO are always-on.

let clocks = clock_init::init_clocks(&system.sys_ctl0, &system.cldo_crg);
// Now safe to construct peripheral drivers
let uart = Uart::new_uart0(peripherals.UART0, Config::default());