Type Definition stm32wb_stm32hal::stm32wb55::exti::imr1::R[][src]

pub type R = R<u32, IMR1>;
Expand description

Reader of register IMR1

Implementations

Bits 0:31 - CPU(m) wakeup with interrupt Mask on Event input

Bit 0 - CPU wakeup with interrupt mask on event input 0.

Bit 1 - CPU wakeup with interrupt mask on event input 1.

Bit 2 - CPU wakeup with interrupt mask on event input 2.

Bit 3 - CPU wakeup with interrupt mask on event input 3.

Bit 4 - CPU wakeup with interrupt mask on event input 4.

Bit 5 - CPU wakeup with interrupt mask on event input 5.

Bit 6 - CPU wakeup with interrupt mask on event input 6.

Bit 7 - CPU wakeup with interrupt mask on event input 7.

Bit 8 - CPU wakeup with interrupt mask on event input 8.

Bit 9 - CPU wakeup with interrupt mask on event input 9.

Bit 10 - CPU wakeup with interrupt mask on event input 10.

Bit 11 - CPU wakeup with interrupt mask on event input 11.

Bit 12 - CPU wakeup with interrupt mask on event input 12.

Bit 13 - CPU wakeup with interrupt mask on event input 13.

Bit 14 - CPU wakeup with interrupt mask on event input 14.

Bit 15 - CPU wakeup with interrupt mask on event input 15.

Bit 16 - CPU wakeup with interrupt mask on event input 16.

Bit 17 - CPU wakeup with interrupt mask on event input 17.

Bit 18 - CPU wakeup with interrupt mask on event input 18.

Bit 19 - CPU wakeup with interrupt mask on event input 19.

Bit 20 - CPU wakeup with interrupt mask on event input 20.

Bit 21 - CPU wakeup with interrupt mask on event input 21.

Bit 22 - CPU wakeup with interrupt mask on event input 22.

Bit 23 - CPU wakeup with interrupt mask on event input 23.

Bit 24 - CPU wakeup with interrupt mask on event input 24.

Bit 25 - CPU wakeup with interrupt mask on event input 25.

Bit 26 - CPU wakeup with interrupt mask on event input 26.

Bit 27 - CPU wakeup with interrupt mask on event input 27.

Bit 28 - CPU wakeup with interrupt mask on event input 28.

Bit 29 - CPU wakeup with interrupt mask on event input 29.

Bit 30 - CPU wakeup with interrupt mask on event input 30.

Bit 31 - CPU wakeup with interrupt mask on event input 31.