#[repr(u8)]pub enum Interrupt {
Show 63 variants
WWDG = 0,
PVD = 1,
RTC_TAMP = 2,
RTC_WKUP = 3,
FLASH = 4,
RCC = 5,
EXTI0 = 6,
EXTI1 = 7,
EXTI2 = 8,
EXTI3 = 9,
EXTI4 = 10,
DMA1_CHANNEL1 = 11,
DMA1_CHANNEL2 = 12,
DMA1_CHANNEL3 = 13,
DMA1_CHANNEL4 = 14,
DMA1_CHANNEL5 = 15,
DMA1_CHANNEL6 = 16,
DMA1_CHANNEL7 = 17,
ADC1 = 18,
USB_HP = 19,
USB_LP = 20,
C2SEV = 21,
COMP = 22,
EXTI5_9 = 23,
TIM1_BRK = 24,
TIM1_UP = 25,
TIM1_TRG_COM_TIM17 = 26,
TIM1_CC = 27,
TIM2 = 28,
PKA = 29,
I2C1_EV = 30,
I2C1_ER = 31,
I2C3_EV = 32,
I2C3_ER = 33,
SPI1 = 34,
SPI2 = 35,
USART1 = 36,
LPUART1 = 37,
SAI1 = 38,
TSC = 39,
EXTI10_15 = 40,
RTC_ALARM = 41,
CRS_IT = 42,
PWR_SOTF = 43,
IPCC_C1_RX_IT = 44,
IPCC_C1_TX_IT = 45,
HSEM = 46,
LPTIM1 = 47,
LPTIM2 = 48,
LCD = 49,
QUADSPI = 50,
AES1 = 51,
AES2 = 52,
TRUE_RNG = 53,
FPU = 54,
DMA2_CH1 = 55,
DMA2_CH2 = 56,
DMA2_CH3 = 57,
DMA2_CH4 = 58,
DMA2_CH5 = 59,
DMA2_CH6 = 60,
DMA2_CH7 = 61,
DMAMUX_OVR = 62,
}Expand description
Enumeration of all the interrupts
Variants§
WWDG = 0
0 - Window Watchdog interrupt
PVD = 1
1 - PVD through EXTI[16] (C1IMR2[20])
RTC_TAMP = 2
2 - RTC/TAMP/CSS on LSE through EXTI line 19 interrupt
RTC_WKUP = 3
3 - RTC wakeup interrupt through EXTI[19]
FLASH = 4
4 - Flash global interrupt
RCC = 5
5 - RCC global interrupt
EXTI0 = 6
6 - EXTI line 0 interrupt through EXTI[0]
EXTI1 = 7
7 - EXTI line 0 interrupt through EXTI[1]
EXTI2 = 8
8 - EXTI line 0 interrupt through EXTI[2]
EXTI3 = 9
9 - EXTI line 0 interrupt through EXTI[3]
EXTI4 = 10
10 - EXTI line 0 interrupt through EXTI[4]
DMA1_CHANNEL1 = 11
11 - DMA1 Channel1 global interrupt
DMA1_CHANNEL2 = 12
12 - DMA1 Channel2 global interrupt
DMA1_CHANNEL3 = 13
13 - DMA1 Channel3 interrupt
DMA1_CHANNEL4 = 14
14 - DMA1 Channel4 interrupt
DMA1_CHANNEL5 = 15
15 - DMA1 Channel5 interrupt
DMA1_CHANNEL6 = 16
16 - DMA1 Channel6 interrupt
DMA1_CHANNEL7 = 17
17 - DMA1 Channel 7 interrupt
ADC1 = 18
18 - ADC1 global interrupt
USB_HP = 19
19 - USB high priority interrupt
USB_LP = 20
20 - USB low priority interrupt (including USB wakeup)
C2SEV = 21
21 - CPU2 SEV through EXTI[40]
COMP = 22
22 - COMP2 & COMP1 interrupt through AIEC[21:20]
EXTI5_9 = 23
23 - EXTI line [9:5] interrupt through EXTI[9:5]
TIM1_BRK = 24
24 - Timer 1 break interrupt
TIM1_UP = 25
25 - Timer 1 Update
TIM1_TRG_COM_TIM17 = 26
26 - TIM1 Trigger and Commutation interrupts and TIM17 global interrupt
TIM1_CC = 27
27 - TIM1 Capture Compare interrupt
TIM2 = 28
28 - TIM2 global interrupt
PKA = 29
29 - Private key accelerator interrupt
I2C1_EV = 30
30 - I2C1 event interrupt
I2C1_ER = 31
31 - I2C1 error interrupt
I2C3_EV = 32
32 - I2C3 event interrupt
I2C3_ER = 33
33 - I2C3 error interrupt
SPI1 = 34
34 - SPI 1 global interrupt
SPI2 = 35
35 - SPI1 global interrupt
USART1 = 36
36 - USART1 global interrupt
LPUART1 = 37
37 - LPUART1 global interrupt
SAI1 = 38
38 - SAI1 global interrupt
TSC = 39
39 - TSC global interrupt
EXTI10_15 = 40
40 - EXTI line [15:10] interrupt through EXTI[15:10]
RTC_ALARM = 41
41 - RTC Alarms (A and B) interrupt through AIEC
CRS_IT = 42
42 - CRS interrupt
PWR_SOTF = 43
43 - PWR switching on the fly interrupt
IPCC_C1_RX_IT = 44
44 - IPCC CPU1 RX occupied interrupt
IPCC_C1_TX_IT = 45
45 - IPCC CPU1 TX free interrupt
HSEM = 46
46 - Semaphore interrupt 0 to CPU1
LPTIM1 = 47
47 - LPtimer 1 global interrupt
LPTIM2 = 48
48 - LPtimer 2 global interrupt
LCD = 49
49 - LCD global interrupt
QUADSPI = 50
50 - QSPI global interrupt
AES1 = 51
51 - AES1 global interrupt
AES2 = 52
52 - AES2 global interrupt
TRUE_RNG = 53
53 - True random number generator interrupt
FPU = 54
54 - Floating point unit interrupt
DMA2_CH1 = 55
55 - DMA2 channel 1 interrupt
DMA2_CH2 = 56
56 - DMA2 channel 2 interrupt
DMA2_CH3 = 57
57 - DMA2 channel 3 interrupt
DMA2_CH4 = 58
58 - DMA2 channel 4 interrupt
DMA2_CH5 = 59
59 - DMA2 channel 5 interrupt
DMA2_CH6 = 60
60 - DMA2 channel 6 interrupt
DMA2_CH7 = 61
61 - DMA2 channel 7 interrupt
DMAMUX_OVR = 62
62 - DMAMUX overrun interrupt