stm32wb_stm32hal::stm32wb55::usb

Struct RegisterBlock

Source 
#[repr(C)]
pub struct RegisterBlock {
Show 37 fields
    pub ep0r: EP0R,
    pub ep1r: EP1R,
    pub ep2r: EP2R,
    pub ep3r: EP3R,
    pub ep4r: EP4R,
    pub ep5r: EP5R,
    pub ep6r: EP6R,
    pub ep7r: EP7R,
    pub cntr: CNTR,
    pub istr: ISTR,
    pub fnr: FNR,
    pub daddr: DADDR,
    pub btable: BTABLE,
    pub count0_tx: COUNT0_TX,
    pub count0_rx: COUNT0_RX,
    pub bcdr: BCDR,
    pub count1_tx: COUNT1_TX,
    pub addr1_rx: ADDR1_RX,
    pub count1_rx: COUNT1_RX,
    pub count2_tx: COUNT2_TX,
    pub addr2_rx: ADDR2_RX,
    pub count2_rx: COUNT2_RX,
    pub count3_tx: COUNT3_TX,
    pub addr3_rx: ADDR3_RX,
    pub count3_rx: COUNT3_RX,
    pub count4_tx: COUNT4_TX,
    pub addr4_rx: ADDR4_RX,
    pub count4_rx: COUNT4_RX,
    pub count5_tx: COUNT5_TX,
    pub addr5_rx: ADDR5_RX,
    pub count5_rx: COUNT5_RX,
    pub count6_tx: COUNT6_TX,
    pub addr6_rx: ADDR6_RX,
    pub count6_rx: COUNT6_RX,
    pub count7_tx: COUNT7_TX,
    pub addr7_rx: ADDR7_RX,
    pub count7_rx: COUNT7_RX,
    /* private fields */

}
Expand description

Register block

Fields§

§ep0r: EP0R

0x00 - endpoint 0 register

§ep1r: EP1R

0x04 - endpoint 1 register

§ep2r: EP2R

0x08 - endpoint 2 register

§ep3r: EP3R

0x0c - endpoint 3 register

§ep4r: EP4R

0x10 - endpoint 4 register

§ep5r: EP5R

0x14 - endpoint 5 register

§ep6r: EP6R

0x18 - endpoint 6 register

§ep7r: EP7R

0x1c - endpoint 7 register

§cntr: CNTR

0x40 - control register

§istr: ISTR

0x44 - interrupt status register

§fnr: FNR

0x48 - frame number register

§daddr: DADDR

0x4c - device address

§btable: BTABLE

0x50 - Buffer table address

§count0_tx: COUNT0_TX

0x52 - Transmission byte count 0

§count0_rx: COUNT0_RX

0x56 - Reception byte count 0

§bcdr: BCDR

0x58 - Battery charging detector(

§count1_tx: COUNT1_TX

0x5a - Transmission byte count 0

§addr1_rx: ADDR1_RX

0x5c - Reception buffer address 0

§count1_rx: COUNT1_RX

0x5e - Reception byte count 0

§count2_tx: COUNT2_TX

0x62 - Transmission byte count 0

§addr2_rx: ADDR2_RX

0x64 - Reception buffer address 0

§count2_rx: COUNT2_RX

0x66 - Reception byte count 0

§count3_tx: COUNT3_TX

0x6a - Transmission byte count 0

§addr3_rx: ADDR3_RX

0x6c - Reception buffer address 0

§count3_rx: COUNT3_RX

0x6e - Reception byte count 0

§count4_tx: COUNT4_TX

0x72 - Transmission byte count 0

§addr4_rx: ADDR4_RX

0x74 - Reception buffer address 0

§count4_rx: COUNT4_RX

0x76 - Reception byte count 0

§count5_tx: COUNT5_TX

0x7a - Transmission byte count 0

§addr5_rx: ADDR5_RX

0x7c - Reception buffer address 0

§count5_rx: COUNT5_RX

0x7e - Reception byte count 0

§count6_tx: COUNT6_TX

0x82 - Transmission byte count 0

§addr6_rx: ADDR6_RX

0x84 - Reception buffer address 0

§count6_rx: COUNT6_RX

0x86 - Reception byte count 0

§count7_tx: COUNT7_TX

0x8a - Transmission byte count 0

§addr7_rx: ADDR7_RX

0x8c - Reception buffer address 0

§count7_rx: COUNT7_RX

0x8e - Reception byte count 0

Implementations§

Source§

impl RegisterBlock

Source

pub fn lpmcsr(&self) -> &LPMCSR

0x54 - control and status register

Source

pub fn lpmcsr_mut(&self) -> &mut LPMCSR

0x54 - control and status register

Source

pub fn addr0_rx(&self) -> &ADDR0_RX

0x54 - Reception buffer address 0

Source

pub fn addr0_rx_mut(&self) -> &mut ADDR0_RX

0x54 - Reception buffer address 0

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