stm32f7x7_hal::stm32::rcc::dckcfgr2

Enum DSISELW

Source 
pub enum DSISELW {
    DSI_PHY,
    PLLR,
}
Expand description

Values that can be written to the field DSISEL

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DSI_PHY

DSI-PHY used as DSI byte lane clock source (usual case)

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PLLR

PLLR used as DSI byte lane clock source, used in case DSI PLL and DSI-PHY are off (low power mode)

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