Expand description
Reset and clock control
Modules§
- ahb1enr
- AHB1 peripheral clock register
- ahb1lpenr
- AHB1 peripheral clock enable in low power mode register
- ahb1rstr
- AHB1 peripheral reset register
- ahb2enr
- AHB2 peripheral clock enable register
- ahb2lpenr
- AHB2 peripheral clock enable in low power mode register
- ahb2rstr
- AHB2 peripheral reset register
- ahb3enr
- AHB3 peripheral clock enable register
- ahb3lpenr
- AHB3 peripheral clock enable in low power mode register
- ahb3rstr
- AHB3 peripheral reset register
- apb1enr
- APB1 peripheral clock enable register
- apb1lpenr
- APB1 peripheral clock enable in low power mode register
- apb1rstr
- APB1 peripheral reset register
- apb2enr
- APB2 peripheral clock enable register
- apb2lpenr
- APB2 peripheral clock enabled in low power mode register
- apb2rstr
- APB2 peripheral reset register
- bdcr
- Backup domain control register
- cfgr
- clock configuration register
- cir
- clock interrupt register
- cr
- clock control register
- csr
- clock control & status register
- dckcfgr1
- dedicated clocks configuration register
- dckcfgr2
- dedicated clocks configuration register
- pllcfgr
- PLL configuration register
- plli2scfgr
- PLLI2S configuration register
- pllsaicfgr
- PLL configuration register
- sscgr
- spread spectrum clock generation register
Structs§
- AHB1ENR
- AHB1 peripheral clock register
- AHB1LPENR
- AHB1 peripheral clock enable in low power mode register
- AHB1RSTR
- AHB1 peripheral reset register
- AHB2ENR
- AHB2 peripheral clock enable register
- AHB2LPENR
- AHB2 peripheral clock enable in low power mode register
- AHB2RSTR
- AHB2 peripheral reset register
- AHB3ENR
- AHB3 peripheral clock enable register
- AHB3LPENR
- AHB3 peripheral clock enable in low power mode register
- AHB3RSTR
- AHB3 peripheral reset register
- APB1ENR
- APB1 peripheral clock enable register
- APB1LPENR
- APB1 peripheral clock enable in low power mode register
- APB1RSTR
- APB1 peripheral reset register
- APB2ENR
- APB2 peripheral clock enable register
- APB2LPENR
- APB2 peripheral clock enabled in low power mode register
- APB2RSTR
- APB2 peripheral reset register
- BDCR
- Backup domain control register
- CFGR
- clock configuration register
- CIR
- clock interrupt register
- CR
- clock control register
- CSR
- clock control & status register
- DCKCFG
R1 - dedicated clocks configuration register
- DCKCFG
R2 - dedicated clocks configuration register
- PLLCFGR
- PLL configuration register
- PLLI2SCFGR
- PLLI2S configuration register
- PLLSAICFGR
- PLL configuration register
- Register
Block - Register block
- SSCGR
- spread spectrum clock generation register