Struct FMC

pub struct FMC { /* private fields */ }

Flexible memory controller

See peripheral structure

Implementations

impl FMC

pub const PTR: *const RegisterBlock = {0xa0000000 as *const stm32f4_staging::stm32f429::fmc::RegisterBlock}

Pointer to the register block

pub const fn ptr() -> *const RegisterBlock

Return the pointer to the register block

pub unsafe fn steal() -> FMC

Steal an instance of this peripheral

Safety

Ensure that the new instance of the peripheral cannot be used in a way that may race with any existing instances, for example by only accessing read-only or write-only registers, or by consuming the original peripheral and using critical sections to coordinate access between multiple new instances.

Additionally, other software such as HALs may rely on only one peripheral instance existing to ensure memory safety; ensure no stolen instances are passed to such software.

Methods from Deref<Target = RegisterBlock>

pub fn bcr1(&self) -> &Reg<BCR1rs>

0x00 - SRAM/NOR-Flash chip-select control register 1

pub fn btr(&self, n: usize) -> &Reg<BTRrs>

0x04..0x14 - SRAM/NOR-Flash chip-select timing register %s

pub fn btr_iter(&self) -> impl Iterator<Item = &Reg<BTRrs>>

Iterator for array of: 0x04..0x14 - SRAM/NOR-Flash chip-select timing register %s

pub fn btr1(&self) -> &Reg<BTRrs>

0x04 - SRAM/NOR-Flash chip-select timing register 1

pub fn btr2(&self) -> &Reg<BTRrs>

0x0c - SRAM/NOR-Flash chip-select timing register 2

pub fn btr3(&self) -> &Reg<BTRrs>

0x14 - SRAM/NOR-Flash chip-select timing register 3

pub fn btr4(&self) -> &Reg<BTRrs>

0x1c - SRAM/NOR-Flash chip-select timing register 4

pub fn bcr(&self, n: usize) -> &Reg<BCRrs>

0x08..0x14 - SRAM/NOR-Flash chip-select control register %s

pub fn bcr_iter(&self) -> impl Iterator<Item = &Reg<BCRrs>>

Iterator for array of: 0x08..0x14 - SRAM/NOR-Flash chip-select control register %s

pub fn bcr2(&self) -> &Reg<BCRrs>

0x08 - SRAM/NOR-Flash chip-select control register 2

pub fn bcr3(&self) -> &Reg<BCRrs>

0x10 - SRAM/NOR-Flash chip-select control register 3

pub fn bcr4(&self) -> &Reg<BCRrs>

0x18 - SRAM/NOR-Flash chip-select control register 4

pub fn pcr(&self, n: usize) -> &Reg<PCRrs>

0x60..0x6c - PC Card/NAND Flash control register %s

pub fn pcr_iter(&self) -> impl Iterator<Item = &Reg<PCRrs>>

Iterator for array of: 0x60..0x6c - PC Card/NAND Flash control register %s

pub fn pcr2(&self) -> &Reg<PCRrs>

0x60 - PC Card/NAND Flash control register 2

pub fn pcr3(&self) -> &Reg<PCRrs>

0x80 - PC Card/NAND Flash control register 3

pub fn pcr4(&self) -> &Reg<PCRrs>

0xa0 - PC Card/NAND Flash control register 4

pub fn sr(&self, n: usize) -> &Reg<SRrs>

0x64..0x70 - FIFO status and interrupt register %s

pub fn sr_iter(&self) -> impl Iterator<Item = &Reg<SRrs>>

Iterator for array of: 0x64..0x70 - FIFO status and interrupt register %s

pub fn sr2(&self) -> &Reg<SRrs>

0x64 - FIFO status and interrupt register 2

pub fn sr3(&self) -> &Reg<SRrs>

0x84 - FIFO status and interrupt register 3

pub fn sr4(&self) -> &Reg<SRrs>

0xa4 - FIFO status and interrupt register 4

pub fn pmem2(&self) -> &Reg<PMEM2rs>

0x68 - Common memory space timing register 2

pub fn patt2(&self) -> &Reg<PATT2rs>

0x6c - Attribute memory space timing register 2

pub fn eccr2(&self) -> &Reg<ECCR2rs>

0x74 - ECC result register 2

pub fn pmem3(&self) -> &Reg<PMEM3rs>

0x88 - Common memory space timing register 3

pub fn patt3(&self) -> &Reg<PATT3rs>

0x8c - Attribute memory space timing register 3

pub fn eccr3(&self) -> &Reg<ECCR3rs>

0x94 - ECC result register 3

pub fn pmem4(&self) -> &Reg<PMEM4rs>

0xa8 - Common memory space timing register 4

pub fn patt4(&self) -> &Reg<PATT4rs>

0xac - Attribute memory space timing register 4

pub fn pio4(&self) -> &Reg<PIO4rs>

0xb0 - I/O space timing register 4

pub fn bwtr(&self, n: usize) -> &Reg<BWTRrs>

0x104..0x114 - SRAM/NOR-Flash write timing registers %s

pub fn bwtr_iter(&self) -> impl Iterator<Item = &Reg<BWTRrs>>

Iterator for array of: 0x104..0x114 - SRAM/NOR-Flash write timing registers %s

pub fn bwtr1(&self) -> &Reg<BWTRrs>

0x104 - SRAM/NOR-Flash write timing registers 1

pub fn bwtr2(&self) -> &Reg<BWTRrs>

0x10c - SRAM/NOR-Flash write timing registers 2

pub fn bwtr3(&self) -> &Reg<BWTRrs>

0x114 - SRAM/NOR-Flash write timing registers 3

pub fn bwtr4(&self) -> &Reg<BWTRrs>

0x11c - SRAM/NOR-Flash write timing registers 4

pub fn sdcr(&self, n: usize) -> &Reg<SDCRrs>

0x140..0x148 - SDRAM Control Register %s

pub fn sdcr_iter(&self) -> impl Iterator<Item = &Reg<SDCRrs>>

Iterator for array of: 0x140..0x148 - SDRAM Control Register %s

pub fn sdcr1(&self) -> &Reg<SDCRrs>

0x140 - SDRAM Control Register 1

pub fn sdcr2(&self) -> &Reg<SDCRrs>

0x144 - SDRAM Control Register 2

pub fn sdtr(&self, n: usize) -> &Reg<SDTRrs>

0x148..0x150 - SDRAM Timing register %s

pub fn sdtr_iter(&self) -> impl Iterator<Item = &Reg<SDTRrs>>

Iterator for array of: 0x148..0x150 - SDRAM Timing register %s

pub fn sdtr1(&self) -> &Reg<SDTRrs>

0x148 - SDRAM Timing register 1

pub fn sdtr2(&self) -> &Reg<SDTRrs>

0x14c - SDRAM Timing register 2

pub fn sdcmr(&self) -> &Reg<SDCMRrs>

0x150 - SDRAM Command Mode register

pub fn sdrtr(&self) -> &Reg<SDRTRrs>

0x154 - SDRAM Refresh Timer register

pub fn sdsr(&self) -> &Reg<SDSRrs>

0x158 - SDRAM Status register

Trait Implementations

impl Debug for FMC

fn fmt(&self, f: &mut Formatter<'_>) -> Result<(), Error>

Formats the value using the given formatter.

impl Deref for FMC

type Target = RegisterBlock

The resulting type after dereferencing.

fn deref(&self) -> &<FMC as Deref>::Target

Dereferences the value.

impl Enable for FMC

fn enable(rcc: &RccRB)

Enables peripheral

fn disable(rcc: &RccRB)

Disables peripheral

fn is_enabled() -> bool

Check if peripheral enabled

fn is_disabled() -> bool

Check if peripheral disabled

unsafe fn enable_unchecked()

Safety

unsafe fn disable_unchecked()

Safety

impl LPEnable for FMC

fn enable_in_low_power(rcc: &RccRB)

Enables peripheral in low power mode

fn disable_in_low_power(rcc: &RccRB)

Disables peripheral in low power mode

fn is_enabled_in_low_power() -> bool

Check if peripheral enabled in low power mode

fn is_disabled_in_low_power() -> bool

Check if peripheral disabled in low power mode

unsafe fn enable_in_low_power_unchecked()

Safety

unsafe fn disable_in_low_power_unchecked()

Safety

impl RccBus for FMC

type Bus = AHB3

Bus type;

impl Reset for FMC

fn reset(rcc: &RccRB)

Resets peripheral

unsafe fn reset_unchecked()

Safety

impl Send for FMC