Struct stm32f3xx_hal_v2::timer::Timer

pub struct Timer<TIM> { /* fields omitted */ }

Hardware timers

Implementations

impl Timer<TIM1>

pub fn tim1<T>(tim: TIM1, timeout: T, clocks: Clocks, apb2: &mut APB2) -> Self where
    T: Into<Hertz>, 

Configures a TIM peripheral as a periodic count down timer

pub fn listen(&mut self, event: Event)

Starts listening for an event

pub fn unlisten(&mut self, event: Event)

Stops listening for an event

pub fn stop(&mut self)

Stops the timer

pub fn clear_update_interrupt_flag(&mut self)

Clears Update Interrupt Flag

pub fn release(self) -> TIM1

Releases the TIM peripheral

pub fn set_period(
    &mut self,
    period: f32,
    clocks: &Clocks
) -> Result<(), ValueError>

Set the timer period, in seconds. Overrides the period or frequency set in the constructor. This allows you to set periods greater than 1hz.

pub fn reset_countdown(&mut self)

Reset the countdown; set the counter to 0.

impl Timer<TIM2>

pub fn tim2<T>(tim: TIM2, timeout: T, clocks: Clocks, apb1: &mut APB1) -> Self where
    T: Into<Hertz>, 

Configures a TIM peripheral as a periodic count down timer

pub fn listen(&mut self, event: Event)

Starts listening for an event

pub fn unlisten(&mut self, event: Event)

Stops listening for an event

pub fn stop(&mut self)

Stops the timer

pub fn clear_update_interrupt_flag(&mut self)

Clears Update Interrupt Flag

pub fn release(self) -> TIM2

Releases the TIM peripheral

pub fn set_period(
    &mut self,
    period: f32,
    clocks: &Clocks
) -> Result<(), ValueError>

Set the timer period, in seconds. Overrides the period or frequency set in the constructor. This allows you to set periods greater than 1hz.

pub fn reset_countdown(&mut self)

Reset the countdown; set the counter to 0.

impl Timer<TIM3>

pub fn tim3<T>(tim: TIM3, timeout: T, clocks: Clocks, apb1: &mut APB1) -> Self where
    T: Into<Hertz>, 

Configures a TIM peripheral as a periodic count down timer

pub fn listen(&mut self, event: Event)

Starts listening for an event

pub fn unlisten(&mut self, event: Event)

Stops listening for an event

pub fn stop(&mut self)

Stops the timer

pub fn clear_update_interrupt_flag(&mut self)

Clears Update Interrupt Flag

pub fn release(self) -> TIM3

Releases the TIM peripheral

pub fn set_period(
    &mut self,
    period: f32,
    clocks: &Clocks
) -> Result<(), ValueError>

Set the timer period, in seconds. Overrides the period or frequency set in the constructor. This allows you to set periods greater than 1hz.

pub fn reset_countdown(&mut self)

Reset the countdown; set the counter to 0.

impl Timer<TIM4>

pub fn tim4<T>(tim: TIM4, timeout: T, clocks: Clocks, apb1: &mut APB1) -> Self where
    T: Into<Hertz>, 

Configures a TIM peripheral as a periodic count down timer

pub fn listen(&mut self, event: Event)

Starts listening for an event

pub fn unlisten(&mut self, event: Event)

Stops listening for an event

pub fn stop(&mut self)

Stops the timer

pub fn clear_update_interrupt_flag(&mut self)

Clears Update Interrupt Flag

pub fn release(self) -> TIM4

Releases the TIM peripheral

pub fn set_period(
    &mut self,
    period: f32,
    clocks: &Clocks
) -> Result<(), ValueError>

Set the timer period, in seconds. Overrides the period or frequency set in the constructor. This allows you to set periods greater than 1hz.

pub fn reset_countdown(&mut self)

Reset the countdown; set the counter to 0.

impl Timer<TIM6>

pub fn tim6<T>(tim: TIM6, timeout: T, clocks: Clocks, apb1: &mut APB1) -> Self where
    T: Into<Hertz>, 

Configures a TIM peripheral as a periodic count down timer

pub fn listen(&mut self, event: Event)

Starts listening for an event

pub fn unlisten(&mut self, event: Event)

Stops listening for an event

pub fn stop(&mut self)

Stops the timer

pub fn clear_update_interrupt_flag(&mut self)

Clears Update Interrupt Flag

pub fn release(self) -> TIM6

Releases the TIM peripheral

pub fn set_period(
    &mut self,
    period: f32,
    clocks: &Clocks
) -> Result<(), ValueError>

Set the timer period, in seconds. Overrides the period or frequency set in the constructor. This allows you to set periods greater than 1hz.

pub fn reset_countdown(&mut self)

Reset the countdown; set the counter to 0.

impl Timer<TIM7>

pub fn tim7<T>(tim: TIM7, timeout: T, clocks: Clocks, apb1: &mut APB1) -> Self where
    T: Into<Hertz>, 

Configures a TIM peripheral as a periodic count down timer

pub fn listen(&mut self, event: Event)

Starts listening for an event

pub fn unlisten(&mut self, event: Event)

Stops listening for an event

pub fn stop(&mut self)

Stops the timer

pub fn clear_update_interrupt_flag(&mut self)

Clears Update Interrupt Flag

pub fn release(self) -> TIM7

Releases the TIM peripheral

pub fn set_period(
    &mut self,
    period: f32,
    clocks: &Clocks
) -> Result<(), ValueError>

Set the timer period, in seconds. Overrides the period or frequency set in the constructor. This allows you to set periods greater than 1hz.

pub fn reset_countdown(&mut self)

Reset the countdown; set the counter to 0.

impl Timer<TIM8>

pub fn tim8<T>(tim: TIM8, timeout: T, clocks: Clocks, apb2: &mut APB2) -> Self where
    T: Into<Hertz>, 

Configures a TIM peripheral as a periodic count down timer

pub fn listen(&mut self, event: Event)

Starts listening for an event

pub fn unlisten(&mut self, event: Event)

Stops listening for an event

pub fn stop(&mut self)

Stops the timer

pub fn clear_update_interrupt_flag(&mut self)

Clears Update Interrupt Flag

pub fn release(self) -> TIM8

Releases the TIM peripheral

pub fn set_period(
    &mut self,
    period: f32,
    clocks: &Clocks
) -> Result<(), ValueError>

Set the timer period, in seconds. Overrides the period or frequency set in the constructor. This allows you to set periods greater than 1hz.

pub fn reset_countdown(&mut self)

Reset the countdown; set the counter to 0.

impl Timer<TIM15>

pub fn tim15<T>(tim: TIM15, timeout: T, clocks: Clocks, apb2: &mut APB2) -> Self where
    T: Into<Hertz>, 

Configures a TIM peripheral as a periodic count down timer

pub fn listen(&mut self, event: Event)

Starts listening for an event

pub fn unlisten(&mut self, event: Event)

Stops listening for an event

pub fn stop(&mut self)

Stops the timer

pub fn clear_update_interrupt_flag(&mut self)

Clears Update Interrupt Flag

pub fn release(self) -> TIM15

Releases the TIM peripheral

pub fn set_period(
    &mut self,
    period: f32,
    clocks: &Clocks
) -> Result<(), ValueError>

Set the timer period, in seconds. Overrides the period or frequency set in the constructor. This allows you to set periods greater than 1hz.

pub fn reset_countdown(&mut self)

Reset the countdown; set the counter to 0.

impl Timer<TIM16>

pub fn tim16<T>(tim: TIM16, timeout: T, clocks: Clocks, apb2: &mut APB2) -> Self where
    T: Into<Hertz>, 

Configures a TIM peripheral as a periodic count down timer

pub fn listen(&mut self, event: Event)

Starts listening for an event

pub fn unlisten(&mut self, event: Event)

Stops listening for an event

pub fn stop(&mut self)

Stops the timer

pub fn clear_update_interrupt_flag(&mut self)

Clears Update Interrupt Flag

pub fn release(self) -> TIM16

Releases the TIM peripheral

pub fn set_period(
    &mut self,
    period: f32,
    clocks: &Clocks
) -> Result<(), ValueError>

Set the timer period, in seconds. Overrides the period or frequency set in the constructor. This allows you to set periods greater than 1hz.

pub fn reset_countdown(&mut self)

Reset the countdown; set the counter to 0.

impl Timer<TIM17>

pub fn tim17<T>(tim: TIM17, timeout: T, clocks: Clocks, apb2: &mut APB2) -> Self where
    T: Into<Hertz>, 

Configures a TIM peripheral as a periodic count down timer

pub fn listen(&mut self, event: Event)

Starts listening for an event

pub fn unlisten(&mut self, event: Event)

Stops listening for an event

pub fn stop(&mut self)

Stops the timer

pub fn clear_update_interrupt_flag(&mut self)

Clears Update Interrupt Flag

pub fn release(self) -> TIM17

Releases the TIM peripheral

pub fn set_period(
    &mut self,
    period: f32,
    clocks: &Clocks
) -> Result<(), ValueError>

Set the timer period, in seconds. Overrides the period or frequency set in the constructor. This allows you to set periods greater than 1hz.

pub fn reset_countdown(&mut self)

Reset the countdown; set the counter to 0.

impl Timer<TIM20>

pub fn tim20<T>(tim: TIM20, timeout: T, clocks: Clocks, apb2: &mut APB2) -> Self where
    T: Into<Hertz>, 

Configures a TIM peripheral as a periodic count down timer

pub fn listen(&mut self, event: Event)

Starts listening for an event

pub fn unlisten(&mut self, event: Event)

Stops listening for an event

pub fn stop(&mut self)

Stops the timer

pub fn clear_update_interrupt_flag(&mut self)

Clears Update Interrupt Flag

pub fn release(self) -> TIM20

Releases the TIM peripheral

pub fn set_period(
    &mut self,
    period: f32,
    clocks: &Clocks
) -> Result<(), ValueError>

Set the timer period, in seconds. Overrides the period or frequency set in the constructor. This allows you to set periods greater than 1hz.

pub fn reset_countdown(&mut self)

Reset the countdown; set the counter to 0.

impl Timer<TIM2>

pub fn set_resolution(&mut self, word: u32)

Set the value of the auto-reload resolution. Use a lower value to increase precision. If you wish for a precise tick speed, multiply the system clock speed by the desired frequency, then round to the nearest integer.

pub fn set_output_compare(&mut self, channel: Channel, mode: OutputCompare)

Set Output Compare Mode. See docs on the OutputCompare enum.

pub fn get_duty(&self, channel: Channel) -> u32

Return the set duty period for a given channel. Divide by get_max_duty() to find the portion of the duty cycle used.

pub fn set_duty(&mut self, channel: Channel, duty: u32)

Set the duty cycle, as a portion of get_max_duty().

pub fn get_max_duty(&self) -> u32

Return the integer associated with the maximum duty period. todo: Duty could be u16 for low-precision timers.

pub fn set_alignment(&mut self, alignment: Alignment)

Set timer alignment to Edge, or one of 3 center modes. STM32F303 ref man, section 21.4.1: Bits 6:5 CMS: Center-aligned mode selection 00: Edge-aligned mode. The counter counts up or down depending on the direction bit (DIR). 01: Center-aligned mode 1. The counter counts up and down alternatively. Output compare interrupt flags of channels configured in output (CCxS=00 in TIMx_CCMRx register) are set only when the counter is counting down. 10: Center-aligned mode 2. The counter counts up and down alternatively. Output compare interrupt flags of channels configured in output (CCxS=00 in TIMx_CCMRx register) are set only when the counter is counting up. 11: Center-aligned mode 3. The counter counts up and down alternatively. Output compare interrupt flags of channels configured in output (CCxS=00 in TIMx_CCMRx register) are set both when the counter is counting up or down.

pub fn set_polarity(&mut self, channel: Channel, polarity: Polarity)

Set output polarity. See docs on the Polarity enum.

pub fn set_complementary_polarity(
    &mut self,
    channel: Channel,
    polarity: Polarity
)

Set complementary output polarity. See docs on the Polarity enum.

pub fn disable(&mut self, channel: Channel)

Disables the timer.

pub fn enable(&mut self, channel: Channel)

Enables the timer.

pub fn set_capture_compare(&mut self, channel: Channel, mode: CaptureCompare)

Set Capture Compare Mode. See docs on the CaptureCompare enum.

pub fn set_preload(&mut self, channel: Channel, value: bool)

Set preload mode. OC1PE: Output Compare 1 preload enable 0: Preload register on TIMx_CCR1 disabled. TIMx_CCR1 can be written at anytime, the new value is taken in account immediately. 1: Preload register on TIMx_CCR1 enabled. Read/Write operations access the preload register. TIMx_CCR1 preload value is loaded in the active register at each update event. Note: 1: These bits can not be modified as long as LOCK level 3 has been programmed (LOCK bits in TIMx_BDTR register) and CC1S=’00’ (the channel is configured in output). 2: The PWM mode can be used without validating the preload register only in one pulse mode (OPM bit set in TIMx_CR1 register). Else the behavior is not guaranteed.

Setting preload is required to enable PWM.

impl Timer<TIM3>

pub fn set_resolution(&mut self, word: u16)

Set the value of the auto-reload resolution. Use a lower value to increase precision. If you wish for a precise tick speed, multiply the system clock speed by the desired frequency, then round to the nearest integer.

pub fn set_output_compare(&mut self, channel: Channel, mode: OutputCompare)

Set Output Compare Mode. See docs on the OutputCompare enum.

pub fn get_duty(&self, channel: Channel) -> u16

Return the set duty period for a given channel. Divide by get_max_duty() to find the portion of the duty cycle used.

pub fn set_duty(&mut self, channel: Channel, duty: u16)

Set the duty cycle, as a portion of get_max_duty().

pub fn get_max_duty(&self) -> u16

Return the integer associated with the maximum duty period. todo: Duty could be u16 for low-precision timers.

pub fn set_alignment(&mut self, alignment: Alignment)

Set timer alignment to Edge, or one of 3 center modes. STM32F303 ref man, section 21.4.1: Bits 6:5 CMS: Center-aligned mode selection 00: Edge-aligned mode. The counter counts up or down depending on the direction bit (DIR). 01: Center-aligned mode 1. The counter counts up and down alternatively. Output compare interrupt flags of channels configured in output (CCxS=00 in TIMx_CCMRx register) are set only when the counter is counting down. 10: Center-aligned mode 2. The counter counts up and down alternatively. Output compare interrupt flags of channels configured in output (CCxS=00 in TIMx_CCMRx register) are set only when the counter is counting up. 11: Center-aligned mode 3. The counter counts up and down alternatively. Output compare interrupt flags of channels configured in output (CCxS=00 in TIMx_CCMRx register) are set both when the counter is counting up or down.

pub fn set_polarity(&mut self, channel: Channel, polarity: Polarity)

Set output polarity. See docs on the Polarity enum.

pub fn set_complementary_polarity(
    &mut self,
    channel: Channel,
    polarity: Polarity
)

Set complementary output polarity. See docs on the Polarity enum.

pub fn disable(&mut self, channel: Channel)

Disables the timer.

pub fn enable(&mut self, channel: Channel)

Enables the timer.

pub fn set_capture_compare(&mut self, channel: Channel, mode: CaptureCompare)

Set Capture Compare Mode. See docs on the CaptureCompare enum.

pub fn set_preload(&mut self, channel: Channel, value: bool)

Set preload mode. OC1PE: Output Compare 1 preload enable 0: Preload register on TIMx_CCR1 disabled. TIMx_CCR1 can be written at anytime, the new value is taken in account immediately. 1: Preload register on TIMx_CCR1 enabled. Read/Write operations access the preload register. TIMx_CCR1 preload value is loaded in the active register at each update event. Note: 1: These bits can not be modified as long as LOCK level 3 has been programmed (LOCK bits in TIMx_BDTR register) and CC1S=’00’ (the channel is configured in output). 2: The PWM mode can be used without validating the preload register only in one pulse mode (OPM bit set in TIMx_CR1 register). Else the behavior is not guaranteed.

Setting preload is required to enable PWM.

impl Timer<TIM4>

pub fn set_resolution(&mut self, word: u16)

Set the value of the auto-reload resolution. Use a lower value to increase precision. If you wish for a precise tick speed, multiply the system clock speed by the desired frequency, then round to the nearest integer.

pub fn set_output_compare(&mut self, channel: Channel, mode: OutputCompare)

Set Output Compare Mode. See docs on the OutputCompare enum.

pub fn get_duty(&self, channel: Channel) -> u16

Return the set duty period for a given channel. Divide by get_max_duty() to find the portion of the duty cycle used.

pub fn set_duty(&mut self, channel: Channel, duty: u16)

Set the duty cycle, as a portion of get_max_duty().

pub fn get_max_duty(&self) -> u16

Return the integer associated with the maximum duty period. todo: Duty could be u16 for low-precision timers.

pub fn set_alignment(&mut self, alignment: Alignment)

Set timer alignment to Edge, or one of 3 center modes. STM32F303 ref man, section 21.4.1: Bits 6:5 CMS: Center-aligned mode selection 00: Edge-aligned mode. The counter counts up or down depending on the direction bit (DIR). 01: Center-aligned mode 1. The counter counts up and down alternatively. Output compare interrupt flags of channels configured in output (CCxS=00 in TIMx_CCMRx register) are set only when the counter is counting down. 10: Center-aligned mode 2. The counter counts up and down alternatively. Output compare interrupt flags of channels configured in output (CCxS=00 in TIMx_CCMRx register) are set only when the counter is counting up. 11: Center-aligned mode 3. The counter counts up and down alternatively. Output compare interrupt flags of channels configured in output (CCxS=00 in TIMx_CCMRx register) are set both when the counter is counting up or down.

pub fn set_polarity(&mut self, channel: Channel, polarity: Polarity)

Set output polarity. See docs on the Polarity enum.

pub fn set_complementary_polarity(
    &mut self,
    channel: Channel,
    polarity: Polarity
)

Set complementary output polarity. See docs on the Polarity enum.

pub fn disable(&mut self, channel: Channel)

Disables the timer.

pub fn enable(&mut self, channel: Channel)

Enables the timer.

pub fn set_capture_compare(&mut self, channel: Channel, mode: CaptureCompare)

Set Capture Compare Mode. See docs on the CaptureCompare enum.

pub fn set_preload(&mut self, channel: Channel, value: bool)

Set preload mode. OC1PE: Output Compare 1 preload enable 0: Preload register on TIMx_CCR1 disabled. TIMx_CCR1 can be written at anytime, the new value is taken in account immediately. 1: Preload register on TIMx_CCR1 enabled. Read/Write operations access the preload register. TIMx_CCR1 preload value is loaded in the active register at each update event. Note: 1: These bits can not be modified as long as LOCK level 3 has been programmed (LOCK bits in TIMx_BDTR register) and CC1S=’00’ (the channel is configured in output). 2: The PWM mode can be used without validating the preload register only in one pulse mode (OPM bit set in TIMx_CR1 register). Else the behavior is not guaranteed.

Setting preload is required to enable PWM.

Trait Implementations

impl CountDown for Timer<TIM1>

type Time = Hertz

The unit of time used by this timer

pub fn start<T>(&mut self, timeout: T) where
    T: Into<Hertz>, 

Starts a new count down

pub fn wait(&mut self) -> Result<(), Void>

Non-blockingly "waits" until the count down finishes

impl CountDown for Timer<TIM2>

type Time = Hertz

The unit of time used by this timer

pub fn start<T>(&mut self, timeout: T) where
    T: Into<Hertz>, 

Starts a new count down

pub fn wait(&mut self) -> Result<(), Void>

Non-blockingly "waits" until the count down finishes

impl CountDown for Timer<TIM20>

type Time = Hertz

The unit of time used by this timer

pub fn start<T>(&mut self, timeout: T) where
    T: Into<Hertz>, 

Starts a new count down

pub fn wait(&mut self) -> Result<(), Void>

Non-blockingly "waits" until the count down finishes

impl CountDown for Timer<TIM3>

type Time = Hertz

The unit of time used by this timer

pub fn start<T>(&mut self, timeout: T) where
    T: Into<Hertz>, 

Starts a new count down

pub fn wait(&mut self) -> Result<(), Void>

Non-blockingly "waits" until the count down finishes

impl CountDown for Timer<TIM4>

type Time = Hertz

The unit of time used by this timer

pub fn start<T>(&mut self, timeout: T) where
    T: Into<Hertz>, 

Starts a new count down

pub fn wait(&mut self) -> Result<(), Void>

Non-blockingly "waits" until the count down finishes

impl CountDown for Timer<TIM6>

type Time = Hertz

The unit of time used by this timer

pub fn start<T>(&mut self, timeout: T) where
    T: Into<Hertz>, 

Starts a new count down

pub fn wait(&mut self) -> Result<(), Void>

Non-blockingly "waits" until the count down finishes

impl CountDown for Timer<TIM7>

type Time = Hertz

The unit of time used by this timer

pub fn start<T>(&mut self, timeout: T) where
    T: Into<Hertz>, 

Starts a new count down

pub fn wait(&mut self) -> Result<(), Void>

Non-blockingly "waits" until the count down finishes

impl CountDown for Timer<TIM8>

type Time = Hertz

The unit of time used by this timer

pub fn start<T>(&mut self, timeout: T) where
    T: Into<Hertz>, 

Starts a new count down

pub fn wait(&mut self) -> Result<(), Void>

Non-blockingly "waits" until the count down finishes

impl CountDown for Timer<TIM15>

type Time = Hertz

The unit of time used by this timer

pub fn start<T>(&mut self, timeout: T) where
    T: Into<Hertz>, 

Starts a new count down

pub fn wait(&mut self) -> Result<(), Void>

Non-blockingly "waits" until the count down finishes

impl CountDown for Timer<TIM16>

type Time = Hertz

The unit of time used by this timer

pub fn start<T>(&mut self, timeout: T) where
    T: Into<Hertz>, 

Starts a new count down

pub fn wait(&mut self) -> Result<(), Void>

Non-blockingly "waits" until the count down finishes

impl CountDown for Timer<TIM17>

type Time = Hertz

The unit of time used by this timer

pub fn start<T>(&mut self, timeout: T) where
    T: Into<Hertz>, 

Starts a new count down

pub fn wait(&mut self) -> Result<(), Void>

Non-blockingly "waits" until the count down finishes

impl Periodic for Timer<TIM1>

impl Periodic for Timer<TIM2>

impl Periodic for Timer<TIM20>

impl Periodic for Timer<TIM3>

impl Periodic for Timer<TIM4>

impl Periodic for Timer<TIM6>

impl Periodic for Timer<TIM7>

impl Periodic for Timer<TIM8>

impl Periodic for Timer<TIM15>

impl Periodic for Timer<TIM16>

impl Periodic for Timer<TIM17>