Docs.rs
stm32f1xx-hal-0.11.0
stm32f1xx-hal 0.11.0
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Docs.rs crate page
MIT
OR
Apache-2.0
Links
Repository
crates.io
Source
Owners
therealprof
TheZoq2
github:stm32-rs:stm32f1
Dependencies
bitflags ^1.3.2
normal
bxcan ^0.8.0
normal
cortex-m ^0.7.7
normal
cortex-m-rt ^0.7.5
normal
defmt ^1.0
normal
optional
embedded-dma ^0.2.0
normal
embedded-hal ^1.0
normal
embedded-hal ^0.2.7
normal
embedded-hal-nb ^1.0
normal
embedded-io ^0.6.1
normal
fugit ^0.3.7
normal
fugit-timer ^0.1.3
normal
nb ^1.1
normal
rtic-monotonic ^1.0
normal
optional
stm32-usbd ^0.8.0
normal
optional
stm32f1 ^0.16.0
normal
vcell ^0.1.3
normal
void ^1.0.2
normal
cortex-m-rtic ^1.1.4
dev
cortex-m-semihosting ^0.5.0
dev
heapless ^0.9.1
dev
mfrc522 ^0.8.0
dev
mpu9250 ^0.25.0
dev
panic-halt ^1.0.0
dev
panic-itm ^0.4.2
dev
panic-probe ^1.0
dev
panic-semihosting ^0.6.0
dev
rtt-target ^0.6.1
dev
usb-device ^0.3.2
dev
usbd-serial ^0.2.2
dev
Versions
35.72%
of the crate is documented
Platform
i686-pc-windows-msvc
i686-unknown-linux-gnu
x86_64-apple-darwin
x86_64-pc-windows-msvc
x86_64-unknown-linux-gnu
Feature flags
docs.rs
About docs.rs
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Receive
stm32f1xx_
hal
0.11.0
Receive
Required Associated Types
RxChannel
TransmittedWord
Implementors
In stm32f1xx_
hal::
dma
stm32f1xx_hal
::
dma
Trait
Receive
Copy item path
Source
pub trait Receive { type
RxChannel
; type
TransmittedWord
; }
Required Associated Types
§
Source
type
RxChannel
Source
type
TransmittedWord
Implementors
§
Source
§
impl
Receive
for
RxDma1
Source
§
type
RxChannel
=
Ch
<
Periph
<
RegisterBlock
, 1073872896>, 4>
Source
§
type
TransmittedWord
=
u8
Source
§
impl
Receive
for
RxDma2
Source
§
type
RxChannel
=
Ch
<
Periph
<
RegisterBlock
, 1073872896>, 5>
Source
§
type
TransmittedWord
=
u8
Source
§
impl
Receive
for
RxDma3
Source
§
type
RxChannel
=
Ch
<
Periph
<
RegisterBlock
, 1073872896>, 2>
Source
§
type
TransmittedWord
=
u8
Source
§
impl
Receive
for
RxDma4
Source
§
type
RxChannel
=
Ch
<
Periph
<
RegisterBlock
, 1073873920>, 2>
Source
§
type
TransmittedWord
=
u8
Source
§
impl<Otype, PULL>
Receive
for
SpiSlaveRxDma
<
SPI1
,
C2
, Otype, PULL>
Source
§
type
RxChannel
=
Ch
<
Periph
<
RegisterBlock
, 1073872896>, 1>
Source
§
type
TransmittedWord
=
u8
Source
§
impl<Otype, PULL>
Receive
for
SpiSlaveRxDma
<
SPI2
,
C4
, Otype, PULL>
Source
§
type
RxChannel
=
Ch
<
Periph
<
RegisterBlock
, 1073872896>, 3>
Source
§
type
TransmittedWord
=
u8
Source
§
impl<Otype, PULL>
Receive
for
SpiSlaveRxTxDma
<
SPI1
,
C2
,
C3
, Otype, PULL>
Source
§
type
RxChannel
=
Ch
<
Periph
<
RegisterBlock
, 1073872896>, 1>
Source
§
type
TransmittedWord
=
u8
Source
§
impl<Otype, PULL>
Receive
for
SpiSlaveRxTxDma
<
SPI2
,
C4
,
C5
, Otype, PULL>
Source
§
type
RxChannel
=
Ch
<
Periph
<
RegisterBlock
, 1073872896>, 3>
Source
§
type
TransmittedWord
=
u8
Source
§
impl<PINS, MODE>
Receive
for
AdcDma
<
ADC1
, PINS, MODE,
C1
>
Source
§
type
RxChannel
=
Ch
<
Periph
<
RegisterBlock
, 1073872896>, 0>
Source
§
type
TransmittedWord
=
u16
Source
§
impl<PINS, MODE>
Receive
for
AdcDma
<
ADC3
, PINS, MODE,
C5
>
Source
§
type
RxChannel
=
Ch
<
Periph
<
RegisterBlock
, 1073873920>, 4>
Source
§
type
TransmittedWord
=
u16
Source
§
impl<PULL>
Receive
for
SpiRxDma
<
SPI1
,
C2
, PULL>
Source
§
type
RxChannel
=
Ch
<
Periph
<
RegisterBlock
, 1073872896>, 1>
Source
§
type
TransmittedWord
=
u8
Source
§
impl<PULL>
Receive
for
SpiRxDma
<
SPI2
,
C4
, PULL>
Source
§
type
RxChannel
=
Ch
<
Periph
<
RegisterBlock
, 1073872896>, 3>
Source
§
type
TransmittedWord
=
u8
Source
§
impl<PULL>
Receive
for
SpiRxTxDma
<
SPI1
,
C2
,
C3
, PULL>
Source
§
type
RxChannel
=
Ch
<
Periph
<
RegisterBlock
, 1073872896>, 1>
Source
§
type
TransmittedWord
=
u8
Source
§
impl<PULL>
Receive
for
SpiRxTxDma
<
SPI2
,
C4
,
C5
, PULL>
Source
§
type
RxChannel
=
Ch
<
Periph
<
RegisterBlock
, 1073872896>, 3>
Source
§
type
TransmittedWord
=
u8