stm32f072x_memory_map::gptim

Struct GpTim

Source 
#[repr(C)]
pub struct GpTim {
Show 18 fields
    pub cr1: Cr1,
    pub cr2: Cr2,
    pub smcr: Smcr,
    pub dier: Dier,
    pub sr: Sr,
    pub egr: Egr,
    pub ccmr1_output: Ccmr1Output,
    pub ccmr2_output: Ccmr2Output,
    pub ccer: Ccer,
    pub cnt: Cnt,
    pub psc: Psc,
    pub arr: Arr,
    pub ccr1: Ccr1,
    pub ccr2: Ccr2,
    pub ccr3: Ccr3,
    pub ccr4: Ccr4,
    pub dcr: Dcr,
    pub dmar: Dmar,
    /* private fields */

}
Expand description

Register block

Fields§

§cr1: Cr1

0x00 - control register 1

§cr2: Cr2

0x04 - control register 2

§smcr: Smcr

0x08 - slave mode control register

§dier: Dier

0x0c - DMA/Interrupt enable register

§sr: Sr

0x10 - status register

§egr: Egr

0x14 - event generation register

§ccmr1_output: Ccmr1Output

0x18 - capture/compare mode register 1 (output mode)

§ccmr2_output: Ccmr2Output

0x1c - capture/compare mode register 2 (output mode)

§ccer: Ccer

0x20 - capture/compare enable register

§cnt: Cnt

0x24 - counter

§psc: Psc

0x28 - prescaler

§arr: Arr

0x2c - auto-reload register

§ccr1: Ccr1

0x34 - capture/compare register 1

§ccr2: Ccr2

0x38 - capture/compare register 2

§ccr3: Ccr3

0x3c - capture/compare register 3

§ccr4: Ccr4

0x40 - capture/compare register 4

§dcr: Dcr

0x48 - DMA control register

§dmar: Dmar

0x4c - DMA address for full transfer

Auto Trait Implementations§

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impl !Freeze for GpTim

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impl !RefUnwindSafe for GpTim

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impl Send for GpTim

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impl Sync for GpTim

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impl Unpin for GpTim

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impl UnwindSafe for GpTim

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