Struct HrTim

pub struct HrTim<TIM, PSCL, CPT1, CPT2, DacRst: DacResetTrigger = NoDacTrigger> { /* private fields */ }

Implementations

impl<TIM: Instance, PSCL, CPT1, CPT2, DacRst> HrTim<TIM, PSCL, CPT1, CPT2, DacRst>

where DacRst: DacResetTrigger,

pub fn set_repetition_counter(&mut self, repetition_counter: u8)

pub fn enable_repetition_interrupt(&mut self, enable: bool)

Trait Implementations

impl<TIM: InstanceX, PSCL, CPT1, CPT2> CaptureEvent<TIM, PSCL> for HrTim<TIM, PSCL, CPT1, CPT2>

Timer Update event

const BITS: u32 = 2u32

impl<DST, PSCL, CPT1, CPT2> EventSource<DST, PSCL> for HrTim<HRTIM_MASTER, PSCL, CPT1, CPT2, NoDacTrigger>

Master Timer Period event

const BITS: u32 = 128u32

impl<TIM: InstanceX, DST, PSCL, CPT1, CPT2, DacRst> EventSource<DST, PSCL> for HrTim<TIM, PSCL, CPT1, CPT2, DacRst>

where DacRst: DacResetTrigger,

Timer Period event

const BITS: u32 = 4u32

impl<TIM: InstanceX, PSCL: HrtimPrescaler, CPT1, CPT2, DacRst> HrSlaveTimer for HrTim<TIM, PSCL, CPT1, CPT2, DacRst>

where DacRst: DacResetTrigger,

fn enable_reset_event<E: TimerResetEventSource<Self::Timer, Self::Prescaler>>( &mut self, _event: &E, )

Reset this timer every time the specified event occurs

Behaviour depends on timer_mode:

• HrTimerMode::SingleShotNonRetriggable: Enabling the timer enables it but does not start it. A first reset event starts the counting and any subsequent reset is ignored until the counter reaches the PER value. The PER event is then generated and the counter is stopped. A reset event restarts the counting from 0x0000.
• HrTimerMode:SingleShotRetriggable: Enabling the timer enables it but does not start it. A reset event starts the counting if the counter is stopped, otherwise it clears the counter. When the counter reaches the PER value, the PER event is generated and the counter is stopped. A reset event restarts the counting from 0x0000.
• HrTimerMode::Continuous: Enabling the timer enables and starts it simultaneously. When the counter reaches the PER value, it rolls-over to 0x0000 and resumes counting. The counter can be reset at any time

fn disable_reset_event<E: TimerResetEventSource<Self::Timer, Self::Prescaler>>( &mut self, _event: &E, )

Stop listening to the specified event

unsafe fn swap_outputs(&self, _hr_control: &mut HrPwmCtrl, swap: SwapPins)

This is only allowed while having register preload enabled (PREEN is set to 1)

type CptCh1 = HrCapt<<HrTim<TIM, PSCL, CPT1, CPT2, DacRst> as HrTimer>::Timer, <HrTim<TIM, PSCL, CPT1, CPT2, DacRst> as HrTimer>::Prescaler, Ch1, NoDma>

type CptCh2 = HrCapt<<HrTim<TIM, PSCL, CPT1, CPT2, DacRst> as HrTimer>::Timer, <HrTim<TIM, PSCL, CPT1, CPT2, DacRst> as HrTimer>::Prescaler, Ch2, NoDma>

impl<TIM: InstanceX, PSCL, DacRst> HrSlaveTimerCpt for HrTim<TIM, PSCL, HrCapt<TIM, PSCL, Ch1, NoDma>, HrCapt<TIM, PSCL, Ch2, NoDma>, DacRst>

where PSCL: HrtimPrescaler, DacRst: DacResetTrigger, HrCapt<TIM, PSCL, Ch1, NoDma>: HrCapture, HrCapt<TIM, PSCL, Ch2, NoDma>: HrCapture,

fn capture_ch1(&mut self) -> &mut Self::CaptureCh1

Access the timers first capture channel

fn capture_ch2(&mut self) -> &mut Self::CaptureCh2

Access the timers second capture channel

type CaptureCh1 = <HrTim<TIM, PSCL, HrCapt<TIM, PSCL, Ch1, NoDma>, HrCapt<TIM, PSCL, Ch2, NoDma>, DacRst> as HrSlaveTimer>::CptCh1

type CaptureCh2 = <HrTim<TIM, PSCL, HrCapt<TIM, PSCL, Ch1, NoDma>, HrCapt<TIM, PSCL, Ch2, NoDma>, DacRst> as HrSlaveTimer>::CptCh2

fn split_capture(self) -> TimerSplitCapture<TIM, PSCL, Ch1, Ch2, DacRst>

impl<TIM: Instance, PSCL: HrtimPrescaler, CPT1, CPT2, DacRst: DacResetTrigger> HrTimer for HrTim<TIM, PSCL, CPT1, CPT2, DacRst>

fn start(&mut self, _hr_control: &mut HrPwmCtrl)

Start timer

fn stop(&mut self, _hr_control: &mut HrPwmCtrl)

Stop timer

fn stop_and_reset(&mut self, _hr_control: &mut HrPwmCtrl)

Stop timer and reset counter

fn as_reset_adc_trigger(&self) -> TimerReset<Self::Timer>

Make a handle to this timers reset event to use as adc trigger

fn as_period_adc_trigger(&self) -> TimerPeriod<Self::Timer>

Make a handle to this timers period event to use as adc trigger

fn disable_register_updates(&mut self, _hr_control: &mut HrPwmCtrl)

Disable register updates

Calling this function temporarily disables the transfer from preload to active registers, whatever the selected update event. This allows to modify several registers. The regular update event takes place once Self::enable_register_updates is called.

fn enable_register_updates<'a>(&mut self, _hr_control: &mut HrPwmCtrl)

Enable register updates

See Self::disable_register_updates.

NOTE: Register updates are enabled by default, no need to call this unless Self::disable_register_updates has been called.

type Prescaler = PSCL

type Timer = TIM

type DacResetTrigger = DacRst

fn get_period(&self) -> u16

Get period of timer in number of ticks

fn set_period(&mut self, period: u16)

Set period of timer in number of ticks

fn get_counter_value(&self) -> u16

Get the current counter value

fn clear_repetition_interrupt(&mut self)

impl<DST, PSCL, CPT1, CPT2> TimerResetEventSource<DST, PSCL> for HrTim<HRTIM_MASTER, PSCL, CPT1, CPT2, NoDacTrigger>

Master Timer Period event

const BITS: u32 = 16u32