Module stm32_hal2::pac::i2c1::timeoutr

Access: No wait states, except if a write access occurs while a write access to this register is ongoing. In this case, wait states are inserted in the second write access until the previous one is completed. The latency of the second write access can be up to 2 x PCLK1 + 6 x I2CCLK.

Structs

R

Register TIMEOUTR reader

TIMEOUTR_SPEC

Access: No wait states, except if a write access occurs while a write access to this register is ongoing. In this case, wait states are inserted in the second write access until the previous one is completed. The latency of the second write access can be up to 2 x PCLK1 + 6 x I2CCLK.

W

Register TIMEOUTR writer

Enums

TEXTEN_A

Extended clock timeout enable

TIDLE_A

Idle clock timeout detection Note: This bit can be written only when TIMOUTEN=0.

TIMOUTEN_A

Clock timeout enable

Type Definitions

TEXTEN_R

Field TEXTEN reader - Extended clock timeout enable

TEXTEN_W

Field TEXTEN writer - Extended clock timeout enable

TIDLE_R

Field TIDLE reader - Idle clock timeout detection Note: This bit can be written only when TIMOUTEN=0.

TIDLE_W

Field TIDLE writer - Idle clock timeout detection Note: This bit can be written only when TIMOUTEN=0.

TIMEOUTA_R

Field TIMEOUTA reader - Bus Timeout A This field is used to configure: The SCL low timeout condition tTIMEOUT when TIDLE=0 tTIMEOUT= (TIMEOUTA+1) x 2048 x tI2CCLK The bus idle condition (both SCL and SDA high) when TIDLE=1 tIDLE= (TIMEOUTA+1) x 4 x tI2CCLK Note: These bits can be written only when TIMOUTEN=0.

TIMEOUTA_W

Field TIMEOUTA writer - Bus Timeout A This field is used to configure: The SCL low timeout condition tTIMEOUT when TIDLE=0 tTIMEOUT= (TIMEOUTA+1) x 2048 x tI2CCLK The bus idle condition (both SCL and SDA high) when TIDLE=1 tIDLE= (TIMEOUTA+1) x 4 x tI2CCLK Note: These bits can be written only when TIMOUTEN=0.

TIMEOUTB_R

Field TIMEOUTB reader - Bus timeout B This field is used to configure the cumulative clock extension timeout: In master mode, the master cumulative clock low extend time (tLOW:MEXT) is detected In slave mode, the slave cumulative clock low extend time (tLOW:SEXT) is detected tLOW:EXT= (TIMEOUTB+1) x 2048 x tI2CCLK Note: These bits can be written only when TEXTEN=0.

TIMEOUTB_W

Field TIMEOUTB writer - Bus timeout B This field is used to configure the cumulative clock extension timeout: In master mode, the master cumulative clock low extend time (tLOW:MEXT) is detected In slave mode, the slave cumulative clock low extend time (tLOW:SEXT) is detected tLOW:EXT= (TIMEOUTB+1) x 2048 x tI2CCLK Note: These bits can be written only when TEXTEN=0.

TIMOUTEN_R

Field TIMOUTEN reader - Clock timeout enable

TIMOUTEN_W

Field TIMOUTEN writer - Clock timeout enable