pub struct R(_);
Expand description
Register CR1
reader
Implementations
sourceimpl R
impl R
sourcepub fn pe(&self) -> BitReaderRaw<PE_A>
pub fn pe(&self) -> BitReaderRaw<PE_A>
Bit 0 - Peripheral enable Note: When PE=0, the I2C SCL and SDA lines are released. Internal state machines and status bits are put back to their reset value. When cleared, PE must be kept low for at least 3 APB clock cycles.
sourcepub fn addrie(&self) -> BitReaderRaw<ADDRIE_A>
pub fn addrie(&self) -> BitReaderRaw<ADDRIE_A>
Bit 3 - Address match Interrupt enable (slave only)
sourcepub fn nackie(&self) -> BitReaderRaw<NACKIE_A>
pub fn nackie(&self) -> BitReaderRaw<NACKIE_A>
Bit 4 - Not acknowledge received Interrupt enable
sourcepub fn tcie(&self) -> BitReaderRaw<TCIE_A>
pub fn tcie(&self) -> BitReaderRaw<TCIE_A>
Bit 6 - Transfer Complete interrupt enable Note: Any of these events will generate an interrupt: Transfer Complete (TC) Transfer Complete Reload (TCR)
sourcepub fn errie(&self) -> BitReaderRaw<ERRIE_A>
pub fn errie(&self) -> BitReaderRaw<ERRIE_A>
Bit 7 - Error interrupts enable Note: Any of these errors generate an interrupt: Arbitration Loss (ARLO) Bus Error detection (BERR) Overrun/Underrun (OVR) Timeout detection (TIMEOUT) PEC error detection (PECERR) Alert pin event detection (ALERT)
sourcepub fn dnf(&self) -> FieldReaderRaw<u8, DNF_A>
pub fn dnf(&self) -> FieldReaderRaw<u8, DNF_A>
Bits 8:11 - Digital noise filter These bits are used to configure the digital noise filter on SDA and SCL input. The digital filter will filter spikes with a length of up to DNF[3:0]
- tI2CCLK … Note: If the analog filter is also enabled, the digital filter is added to the analog filter. This filter can only be programmed when the I2C is disabled (PE = 0).
sourcepub fn anfoff(&self) -> BitReaderRaw<ANFOFF_A>
pub fn anfoff(&self) -> BitReaderRaw<ANFOFF_A>
Bit 12 - Analog noise filter OFF Note: This bit can only be programmed when the I2C is disabled (PE = 0).
sourcepub fn sbc(&self) -> BitReaderRaw<SBC_A>
pub fn sbc(&self) -> BitReaderRaw<SBC_A>
Bit 16 - Slave byte control This bit is used to enable hardware byte control in slave mode.
sourcepub fn nostretch(&self) -> BitReaderRaw<NOSTRETCH_A>
pub fn nostretch(&self) -> BitReaderRaw<NOSTRETCH_A>
Bit 17 - Clock stretching disable This bit is used to disable clock stretching in slave mode. It must be kept cleared in master mode. Note: This bit can only be programmed when the I2C is disabled (PE = 0).
sourcepub fn wupen(&self) -> BitReaderRaw<WUPEN_A>
pub fn wupen(&self) -> BitReaderRaw<WUPEN_A>
Bit 18 - Wakeup from Stop mode enable Note: If the Wakeup from Stop mode feature is not supported, this bit is reserved and forced by hardware to 0. Please refer to Section25.3: I2C implementation. Note: WUPEN can be set only when DNF = 0000
sourcepub fn smbhen(&self) -> BitReaderRaw<SMBHEN_A>
pub fn smbhen(&self) -> BitReaderRaw<SMBHEN_A>
Bit 20 - SMBus Host address enable Note: If the SMBus feature is not supported, this bit is reserved and forced by hardware to 0. Please refer to Section25.3: I2C implementation.
sourcepub fn smbden(&self) -> BitReaderRaw<SMBDEN_A>
pub fn smbden(&self) -> BitReaderRaw<SMBDEN_A>
Bit 21 - SMBus Device Default address enable Note: If the SMBus feature is not supported, this bit is reserved and forced by hardware to 0. Please refer to Section25.3: I2C implementation.
sourcepub fn alerten(&self) -> BitReaderRaw<ALERTEN_A>
pub fn alerten(&self) -> BitReaderRaw<ALERTEN_A>
Bit 22 - SMBus alert enable Device mode (SMBHEN=0): Host mode (SMBHEN=1): Note: When ALERTEN=0, the SMBA pin can be used as a standard GPIO. If the SMBus feature is not supported, this bit is reserved and forced by hardware to 0. Please refer to Section25.3: I2C implementation.
Methods from Deref<Target = R<CR1_SPEC>>
sourcepub fn bits(&self) -> <REG as RegisterSpec>::Ux
pub fn bits(&self) -> <REG as RegisterSpec>::Ux
Reads raw bits from register.