pub struct CR1_SPEC;
Expand description
Access: No wait states, except if a write access occurs while a write access to this register is ongoing. In this case, wait states are inserted in the second write access until the previous one is completed. The latency of the second write access can be up to 2 x PCLK1 + 6 x I2CCLK.
This register you can read
, write_with_zero
, reset
, write
, modify
. See API.
For information about available fields see cr1 module
Trait Implementations
sourceimpl RegisterSpec for CR1_SPEC
impl RegisterSpec for CR1_SPEC
sourceimpl Resettable for CR1_SPEC
impl Resettable for CR1_SPEC
reset()
method sets CR1 to value 0
sourcefn reset_value() -> <CR1_SPEC as RegisterSpec>::Ux
fn reset_value() -> <CR1_SPEC as RegisterSpec>::Ux
Reset value of the register.
Auto Trait Implementations
impl RefUnwindSafe for CR1_SPEC
impl Send for CR1_SPEC
impl Sync for CR1_SPEC
impl Unpin for CR1_SPEC
impl UnwindSafe for CR1_SPEC
Blanket Implementations
sourceimpl<T> BorrowMut<T> for Twhere
T: ?Sized,
impl<T> BorrowMut<T> for Twhere
T: ?Sized,
const: unstable · sourcefn borrow_mut(&mut self) -> &mut T
fn borrow_mut(&mut self) -> &mut T
Mutably borrows from an owned value. Read more