RegisterBlock

s32k142_pac::sim

Struct RegisterBlock 

Source 
#[repr(C)]
pub struct RegisterBlock {
Show 15 fields
    pub chipctl: Reg<CHIPCTL_SPEC>,
    pub ftmopt0: Reg<FTMOPT0_SPEC>,
    pub lpoclks: Reg<LPOCLKS_SPEC>,
    pub adcopt: Reg<ADCOPT_SPEC>,
    pub ftmopt1: Reg<FTMOPT1_SPEC>,
    pub misctrl0: Reg<MISCTRL0_SPEC>,
    pub sdid: Reg<SDID_SPEC>,
    pub platcgc: Reg<PLATCGC_SPEC>,
    pub fcfg1: Reg<FCFG1_SPEC>,
    pub uidh: Reg<UIDH_SPEC>,
    pub uidmh: Reg<UIDMH_SPEC>,
    pub uidml: Reg<UIDML_SPEC>,
    pub uidl: Reg<UIDL_SPEC>,
    pub clkdiv4: Reg<CLKDIV4_SPEC>,
    pub misctrl1: Reg<MISCTRL1_SPEC>,
    /* private fields */

}
Expand description

Register block

Fields§

§chipctl: Reg<CHIPCTL_SPEC>

0x04 - Chip Control register

§ftmopt0: Reg<FTMOPT0_SPEC>

0x0c - FTM Option Register 0

§lpoclks: Reg<LPOCLKS_SPEC>

0x10 - LPO Clock Select Register

§adcopt: Reg<ADCOPT_SPEC>

0x18 - ADC Options Register

§ftmopt1: Reg<FTMOPT1_SPEC>

0x1c - FTM Option Register 1

§misctrl0: Reg<MISCTRL0_SPEC>

0x20 - Miscellaneous control register 0

§sdid: Reg<SDID_SPEC>

0x24 - System Device Identification Register

§platcgc: Reg<PLATCGC_SPEC>

0x40 - Platform Clock Gating Control Register

§fcfg1: Reg<FCFG1_SPEC>

0x4c - Flash Configuration Register 1

§uidh: Reg<UIDH_SPEC>

0x54 - Unique Identification Register High

§uidmh: Reg<UIDMH_SPEC>

0x58 - Unique Identification Register Mid-High

§uidml: Reg<UIDML_SPEC>

0x5c - Unique Identification Register Mid Low

§uidl: Reg<UIDL_SPEC>

0x60 - Unique Identification Register Low

§clkdiv4: Reg<CLKDIV4_SPEC>

0x68 - System Clock Divider Register 4

§misctrl1: Reg<MISCTRL1_SPEC>

0x6c - Miscellaneous Control register 1

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