Struct TlmFifo 

pub struct TlmFifo<T: 'static> { /* private fields */ }

A bounded (or unbounded) FIFO that is also a component in the hierarchy.

Declare it as a child with #[component] so it appears in the tree, then hand out its exports in connect.

Implementations

impl<T: 'static> TlmFifo<T>

pub fn new(size: usize) -> TlmFifo<T>

A FIFO size items deep. Depth 1 is the UVM default and forces the producer to wait for the consumer.

pub fn unbounded() -> TlmFifo<T>

A FIFO with no depth limit: a put never blocks.

pub fn size(&self) -> Option<usize>

The declared depth; None for an unbounded FIFO.

pub fn used(&self) -> usize

How many items are in it now.

pub fn is_empty(&self) -> bool

pub fn is_full(&self) -> bool

pub fn flush(&self)

Throw away everything in the FIFO (UVM flush).

pub fn put_export(&self) -> PutExport<T>

The put side, to connect to a component’s PutPort.

pub fn get_export(&self) -> GetExport<T>

The get side, to connect to a component’s GetPort.

pub fn put_ap(&self) -> TapExport<T>

The tap that fires as each item goes in (uvm_tlm_fifo::put_ap).

pub fn get_ap(&self) -> TapExport<T>

The tap that fires as each item comes out (uvm_tlm_fifo::get_ap).

pub async fn put(&self, item: T)

pub fn try_put(&self, item: T) -> Result<(), T>

pub async fn get(&self) -> T

pub fn try_get(&self) -> Option<T>

pub fn handle(&self) -> TlmFifo<T>

A second handle to the same FIFO (for wiring at construction).

impl<T: Clone + 'static> TlmFifo<T>

pub fn peek_export(&self) -> PeekExport<T>

The peek side, to connect to a PeekPort. Peek copies rather than removes, which is why it needs T: Clone.

pub async fn peek(&self) -> T

pub fn try_peek(&self) -> Option<T>

Trait Implementations

impl<T: 'static> Component for TlmFifo<T>

fn build(&mut self, ctx: &mut RustdvCtx)

build — top-down. Where a component constructs its children (D6); the gap between “a component exists” and “its children exist” that all late binding lives in.

fn connect(&mut self, ctx: &mut RustdvCtx)

connect — bottom-up. Wire children together once they exist.

fn end_of_elaboration(&mut self, ctx: &mut RustdvCtx)

end_of_elaboration — top-down. The hierarchy is final.

fn start_of_simulation(&mut self, ctx: &mut RustdvCtx)

start_of_simulation — top-down. Last chance before time moves.

async fn run(&mut self, ctx: &mut RustdvCtx) -> Result<(), TestError>

run — bottom-up, async, objection-gated. The test body; Err fails the test.

fn extract(&mut self, ctx: &mut RustdvCtx)

extract — top-down, post-run.

fn check(&mut self, ctx: &mut RustdvCtx, errors: &mut CheckSink)

check — top-down. Report failures into the sink.

fn report(&mut self, ctx: &mut RustdvCtx)

report — top-down.

fn final_phase(&mut self, ctx: &mut RustdvCtx)

final_phase — top-down. (final is a Rust keyword.)

fn start(&mut self, ctx: &mut RustdvCtx)

Transitional spawn hook, pre-dating the restored run traversal. tinyalu_tb and the not-yet-converted chapters still spawn free-running behavior here; it folds into run as each converts. Not part of the nine-phase lifecycle.

fn comp_name() -> &'static str

where Self: Sized,

This type’s registered short name, used as the factory override key. The last path segment of the type name (Foo from crate::mod::Foo), which matches the name #[derive(Component)] registers.

fn new_comp() -> RustdvComp

where Self: Sized + Default + ComponentNode + 'static,

Build this component the normal way and drop it in an crate::factory::RustdvComp slot — the analogue of UVM’s new (D75). Not overridable.

fn create_comp() -> RustdvComp

where Self: Sized + Default + ComponentNode + 'static,

Build this component through the factory — the analogue of UVM’s create (D75). The default is built now and the slot is flagged; the build walk swaps in an override if one applies.

impl<T: 'static> ComponentNode for TlmFifo<T>

fn node_name(&self) -> &'static str

The component’s type-level name (hierarchical path is synthesized from field names during traversal).

fn children_mut(&mut self) -> Vec<(String, &mut (dyn ComponentNode + 'static))>

Direct children as (field-derived name, node) pairs, in declaration order. An owned Vec, not a visit_children-style sync callback: run_all awaits inside the walk, and a higher-ranked closure cannot yield a child borrow that outlives the call, so the borrows have to come back in a value the caller holds. An Option<T> child created during build (D6) appears here only once it is Some.

fn port_slot(&self, name: &str) -> Option<Rc<dyn Any>>

This node’s port binding cell of the given name, erased (D83).

fn port_infos(&self) -> Vec<PortInfo>

Every port this node declares, for the elaboration report.

fn resolve_children(&mut self, ctx: &RustdvCtx)

Resolve factory overrides for this node’s RustdvComp fields (D75). The derive generates this to call field.resolve(ctx, "field") for each RustdvComp field; the default is a no-op for nodes with none. Called by build_all after build, before descending — so a swapped-out default’s own phases never run.

fn take_children(&mut self) -> Vec<(String, Box<dyn ComponentNode>)>

Move this node’s RustdvComp children out, for the run phase (D82b).

fn restore_children(&mut self, taken: Vec<(String, Box<dyn ComponentNode>)>)

Put back what ComponentNode::take_children removed, in the same order. Called unconditionally after the run phase — including on error — so the post-run phases walk a whole tree.

impl<T: 'static> Default for TlmFifo<T>

fn default() -> Self

Depth 1, the UVM default — and the depth that makes a producer and a consumer take turns, which is what most testbenches want.