Struct rust_hdl::widgets::synchronizer::BitSynchronizer

pub struct BitSynchronizer {
    pub sig_in: Signal<In, Bit>,
    pub sig_out: Signal<Out, Bit>,
    pub clock: Signal<In, Clock>,
    /* private fields */
}

A BitSynchronizer is used to move signals that are asynchronous to a clock into that clock domain using a pair of back-to-back flip-flops. While the first flip flop may become metastable, the second one is likely to be stable.

Fields

sig_in: Signal<In, Bit>

The input signal, which is asynchronous to the clock

sig_out: Signal<Out, Bit>

The output signal, synchronized to the clock

clock: Signal<In, Clock>

The clock signal to synchronize the output to

Trait Implementations

impl Block for BitSynchronizer

fn connect_all(&mut self)

Connects the internal signals of the circuit - used to initialize the circuit

fn update_all(&mut self)

Propogate changes from inputs to outputs within the circuit

fn has_changed(&self) -> bool

Returns true if anything in the circuit has changed (outputs or internal state)

fn accept(&self, name: &str, probe: &mut dyn Probe)

The visitor pattern - allows a circuit to be probed by a Probe struct.

impl Default for BitSynchronizer

fn default() -> BitSynchronizer

Returns the “default value” for a type.

impl Logic for BitSynchronizer

fn update(&mut self)

fn connect(&mut self)

fn hdl(&self) -> Verilog

fn timing(&self) -> Vec<TimingInfo>