Struct rust_hdl::bsp::ok_core::clock::ClockBuffer

pub struct ClockBuffer {
    pub clock_in: Signal<In, Clock>,
    pub clock_out: Signal<Out, Clock>,
}

Fields

clock_in: Signal<In, Clock>

clock_out: Signal<Out, Clock>

Trait Implementations

impl Block for ClockBuffer

fn connect_all(&mut self)

fn update_all(&mut self)

fn has_changed(&self) -> bool

fn accept(&self, name: &str, probe: &mut dyn Probe)

impl Default for ClockBuffer

fn default() -> ClockBuffer

Returns the “default value” for a type.

impl Logic for ClockBuffer

fn update(&mut self)

fn connect(&mut self)

fn hdl(&self) -> Verilog