Struct f16 

pub struct f16(/* private fields */);

A 16-bit floating point number, stored in IEEE 754 half-precision format.

Implementations

impl f16

pub const fn from_bits(bits: u16) -> Self

Create an f16 from its raw bit pattern.

pub const fn to_bits(self) -> u16

Return the raw bit pattern of this value.

pub fn from_f32(x: f32) -> Self

Convert an f32 to the nearest f16, rounding ties to even.

pub fn to_f32(self) -> f32

Convert this value to an f32.

This conversion is always exact, since every f16 value is representable as an f32.

Trait Implementations

impl BitOps<f16> for Avx2Isa

type Simd = F16x16

SIMD vector containing lanes of type T.

fn len(self) -> usize

Return the number of elements in the vector.

fn prefetch(self, ptr: *const <F16x16 as Simd>::Elem)

Pre-fetch the cache line containing ptr for reading.

fn prefetch_write(self, ptr: *mut <F16x16 as Simd>::Elem)

Pre-fetch the cache line containing ptr for writing.

fn and(self, x: F16x16, y: F16x16) -> F16x16

Return the bitwise AND of x and y.

fn or(self, x: F16x16, y: F16x16) -> F16x16

Return the bitwise OR of x and y.

fn xor(self, x: F16x16, y: F16x16) -> F16x16

Return the bitwise XOR of x and y.

fn not(self, x: F16x16) -> F16x16

Return the bitwise NOT of x.

fn first_n_mask(self, n: usize) -> M16

Return a mask with the first n lanes set to true.

fn splat(self, x: f16) -> F16x16

Create a new vector with all lanes set to x.

unsafe fn load_ptr(self, ptr: *const f16) -> F16x16

Load vector of elements from ptr.

fn select(self, x: F16x16, y: F16x16, mask: M16) -> F16x16

Select elements from x or y according to a mask.

unsafe fn store_ptr(self, x: F16x16, ptr: *mut f16)

Store the values in this vector to a memory location.

unsafe fn load_ptr_mask(self, ptr: *const f16, mask: M16) -> F16x16

Load vector elements from ptr using a mask.

unsafe fn store_ptr_mask(self, x: F16x16, ptr: *mut f16, mask: M16)

Store the values in this vector to a memory location, where the corresponding mask element is set.

fn from_bits(self, x: <<Self::Simd as Simd>::Isa as Isa>::Bits) -> Self::Simd

Convert x to an untyped vector of the same width.

fn zero(self) -> Self::Simd

Create a new vector with all lanes set to zero.

fn broadcast_lane<const LANE: i32>(self, x: Self::Simd) -> Self::Simd

Broadcast the element from one lane of a vector to all lanes of a new vector.

fn fold_splat<F: Fn(T, T) -> T>( self, x: Self::Simd, accum: T, f: F, ) -> Self::Simd

Reduce the elements in x to a single value using f, then return a new vector with the accumulated value broadcast to each lane.

fn load(self, xs: &[T]) -> Self::Simd

Load the first self.len() elements from a slice into a vector.

fn load_many<const N: usize>(self, xs: &[T]) -> [Self::Simd; N]

Load N vectors from consecutive sub-slices of xs.

fn load_pad(self, xs: &[T]) -> (Self::Simd, <Self::Simd as Simd>::Mask)

Load elements from xs into a vector.

fn store(self, x: Self::Simd, xs: &mut [T])

Store x into the first self.len() elements of xs.

fn store_uninit(self, x: Self::Simd, xs: &mut [MaybeUninit<T>]) -> &mut [T]

Store x into the first self.len() elements of xs.

fn store_many_uninit<const N: usize>( self, vecs: [Self::Simd; N], xs: &mut [MaybeUninit<T>], ) -> &mut [T]

Store N vectors into consecutive sub-slices of xs, returning the initialized portion.

impl BitOps<f16> for Avx512Isa

type Simd = F16x32

SIMD vector containing lanes of type T.

fn len(self) -> usize

Return the number of elements in the vector.

fn first_n_mask(self, n: usize) -> __mmask32

Return a mask with the first n lanes set to true.

fn prefetch(self, ptr: *const <F16x32 as Simd>::Elem)

Pre-fetch the cache line containing ptr for reading.

fn prefetch_write(self, ptr: *mut <F16x32 as Simd>::Elem)

Pre-fetch the cache line containing ptr for writing.

fn and(self, x: F16x32, y: F16x32) -> F16x32

Return the bitwise AND of x and y.

fn or(self, x: F16x32, y: F16x32) -> F16x32

Return the bitwise OR of x and y.

fn xor(self, x: F16x32, y: F16x32) -> F16x32

Return the bitwise XOR of x and y.

fn not(self, x: F16x32) -> F16x32

Return the bitwise NOT of x.

fn splat(self, x: f16) -> F16x32

Create a new vector with all lanes set to x.

unsafe fn load_ptr(self, ptr: *const f16) -> F16x32

Load vector of elements from ptr.

fn select(self, x: F16x32, y: F16x32, mask: <F16x32 as Simd>::Mask) -> F16x32

Select elements from x or y according to a mask.

unsafe fn store_ptr(self, x: F16x32, ptr: *mut f16)

Store the values in this vector to a memory location.

unsafe fn load_ptr_mask(self, ptr: *const f16, mask: __mmask32) -> F16x32

Load vector elements from ptr using a mask.

unsafe fn store_ptr_mask(self, x: F16x32, ptr: *mut f16, mask: __mmask32)

Store the values in this vector to a memory location, where the corresponding mask element is set.

fn from_bits(self, x: <<Self::Simd as Simd>::Isa as Isa>::Bits) -> Self::Simd

Convert x to an untyped vector of the same width.

fn zero(self) -> Self::Simd

Create a new vector with all lanes set to zero.

fn broadcast_lane<const LANE: i32>(self, x: Self::Simd) -> Self::Simd

Broadcast the element from one lane of a vector to all lanes of a new vector.

fn fold_splat<F: Fn(T, T) -> T>( self, x: Self::Simd, accum: T, f: F, ) -> Self::Simd

Reduce the elements in x to a single value using f, then return a new vector with the accumulated value broadcast to each lane.

fn load(self, xs: &[T]) -> Self::Simd

Load the first self.len() elements from a slice into a vector.

fn load_many<const N: usize>(self, xs: &[T]) -> [Self::Simd; N]

Load N vectors from consecutive sub-slices of xs.

fn load_pad(self, xs: &[T]) -> (Self::Simd, <Self::Simd as Simd>::Mask)

Load elements from xs into a vector.

fn store(self, x: Self::Simd, xs: &mut [T])

Store x into the first self.len() elements of xs.

fn store_uninit(self, x: Self::Simd, xs: &mut [MaybeUninit<T>]) -> &mut [T]

Store x into the first self.len() elements of xs.

fn store_many_uninit<const N: usize>( self, vecs: [Self::Simd; N], xs: &mut [MaybeUninit<T>], ) -> &mut [T]

Store N vectors into consecutive sub-slices of xs, returning the initialized portion.

impl BitOps<f16> for GenericIsa

type Simd = F16x8

SIMD vector containing lanes of type T.

fn len(self) -> usize

Return the number of elements in the vector.

fn first_n_mask(self, n: usize) -> M16

Return a mask with the first n lanes set to true.

unsafe fn load_ptr_mask( self, ptr: *const <F16x8 as Simd>::Elem, mask: <F16x8 as Simd>::Mask, ) -> F16x8

Load vector elements from ptr using a mask.

unsafe fn store_ptr_mask( self, x: F16x8, ptr: *mut <F16x8 as Simd>::Elem, mask: <F16x8 as Simd>::Mask, )

Store the values in this vector to a memory location, where the corresponding mask element is set.

fn splat(self, x: f16) -> F16x8

Create a new vector with all lanes set to x.

unsafe fn load_ptr(self, ptr: *const f16) -> F16x8

Load vector of elements from ptr.

fn select(self, x: F16x8, y: F16x8, mask: <F16x8 as Simd>::Mask) -> F16x8

Select elements from x or y according to a mask.

unsafe fn store_ptr(self, x: F16x8, ptr: *mut f16)

Store the values in this vector to a memory location.

fn and(self, x: F16x8, y: F16x8) -> F16x8

Return the bitwise AND of x and y.

fn not(self, x: F16x8) -> F16x8

Return the bitwise NOT of x.

fn or(self, x: F16x8, y: F16x8) -> F16x8

Return the bitwise OR of x and y.

fn xor(self, x: F16x8, y: F16x8) -> F16x8

Return the bitwise XOR of x and y.

fn from_bits(self, x: <<Self::Simd as Simd>::Isa as Isa>::Bits) -> Self::Simd

Convert x to an untyped vector of the same width.

fn zero(self) -> Self::Simd

Create a new vector with all lanes set to zero.

fn broadcast_lane<const LANE: i32>(self, x: Self::Simd) -> Self::Simd

Broadcast the element from one lane of a vector to all lanes of a new vector.

fn fold_splat<F: Fn(T, T) -> T>( self, x: Self::Simd, accum: T, f: F, ) -> Self::Simd

Reduce the elements in x to a single value using f, then return a new vector with the accumulated value broadcast to each lane.

fn load(self, xs: &[T]) -> Self::Simd

Load the first self.len() elements from a slice into a vector.

fn load_many<const N: usize>(self, xs: &[T]) -> [Self::Simd; N]

Load N vectors from consecutive sub-slices of xs.

fn load_pad(self, xs: &[T]) -> (Self::Simd, <Self::Simd as Simd>::Mask)

Load elements from xs into a vector.

fn store(self, x: Self::Simd, xs: &mut [T])

Store x into the first self.len() elements of xs.

fn store_uninit(self, x: Self::Simd, xs: &mut [MaybeUninit<T>]) -> &mut [T]

Store x into the first self.len() elements of xs.

fn store_many_uninit<const N: usize>( self, vecs: [Self::Simd; N], xs: &mut [MaybeUninit<T>], ) -> &mut [T]

Store N vectors into consecutive sub-slices of xs, returning the initialized portion.

fn prefetch(self, ptr: *const T)

Pre-fetch the cache line containing ptr for reading.

fn prefetch_write(self, ptr: *mut T)

Pre-fetch the cache line containing ptr for writing.

impl Clone for f16

fn clone(&self) -> f16

Returns a duplicate of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Copy for f16

impl Debug for f16

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl Default for f16

fn default() -> f16

Returns the “default value” for a type.

impl Elem for f16

fn one() -> Self

Return the 1 value of this type.

impl Extend<f16> for Avx2Isa

type Output = F32x8

SIMD vector type with elements that have twice the bit-width of those in Self::SIMD.

fn extend_low(self, x: F16x16) -> F32x8

Extend each lane in the low half of the input to a type with twice the width.

fn extend_high(self, x: F16x16) -> F32x8

Extend each lane in the high half of the input to a type with twice the width.

impl Extend<f16> for Avx512Isa

type Output = F32x16

SIMD vector type with elements that have twice the bit-width of those in Self::SIMD.

fn extend_low(self, x: F16x32) -> F32x16

Extend each lane in the low half of the input to a type with twice the width.

fn extend_high(self, x: F16x32) -> F32x16

Extend each lane in the high half of the input to a type with twice the width.

impl Extend<f16> for GenericIsa

type Output = F32x4

SIMD vector type with elements that have twice the bit-width of those in Self::SIMD.

fn extend_low(self, x: F16x8) -> F32x4

Extend each lane in the low half of the input to a type with twice the width.

fn extend_high(self, x: F16x8) -> F32x4

Extend each lane in the high half of the input to a type with twice the width.

impl From<f16> for f32

fn from(x: f16) -> f32

Converts to this type from the input type.

impl From<f32> for f16

fn from(x: f32) -> f16

Converts to this type from the input type.

impl GetBitOps for f16

fn bit_ops<I: Isa>( isa: I, ) -> impl BitOps<Self, Simd = <Self as GetSimd>::Simd<I>>

Return the BitOps implementation from a SIMD Isa that provides operations on vectors containing elements of type Self.

impl GetSimd for f16

type Simd<I: Isa> = <I as Isa>::F16

impl NarrowSaturate<f32, f16> for Avx2Isa

type Output = F16x16

fn narrow_saturate(self, low: F32x8, high: F32x8) -> F16x16

Narrow each lane in a pair of vectors to one with half the bit-width.

impl NarrowSaturate<f32, f16> for Avx512Isa

type Output = F16x32

fn narrow_saturate(self, low: F32x16, high: F32x16) -> F16x32

Narrow each lane in a pair of vectors to one with half the bit-width.

impl NarrowSaturate<f32, f16> for GenericIsa

type Output = F16x8

fn narrow_saturate(self, low: F32x4, high: F32x4) -> F16x8

Narrow each lane in a pair of vectors to one with half the bit-width.

impl PartialEq for f16

fn eq(&self, other: &f16) -> bool

Equality operator ==.

fn ne(&self, other: &Rhs) -> bool

Inequality operator !=.

impl StructuralPartialEq for f16