Type Definition rp2040_pac::pio0::sm::SM_CLKDIV

type SM_CLKDIV = Reg<u32, _SM_CLKDIV>;

Clock divider register for state machine 0\n Frequency = clock freq / (CLKDIV_INT + CLKDIV_FRAC / 256)

This register you can read, reset, write, write_with_zero, modify. See API.

For information about available fields see sm_clkdiv module

Trait Implementations

impl ResetValue for SM_CLKDIV

Register SM_CLKDIV reset()’s with value 0x0001_0000

type Type = u32

Register size

fn reset_value() -> Self::Type

Reset value of the register

impl Readable for SM_CLKDIV

read() method returns sm_clkdiv::R reader structure

impl Writable for SM_CLKDIV

write(|w| ..) method takes sm_clkdiv::W writer structure