Module rp2040_pac::pio0::sm::sm_clkdiv [−][src]
Expand description
Clock divider register for state machine 0\n Frequency = clock freq / (CLKDIV_INT + CLKDIV_FRAC / 256)
Structs
| FRAC_W | Write proxy for field |
| INT_W | Write proxy for field |
Type Definitions
| FRAC_R | Reader of field |
| INT_R | Reader of field |
| R | Reader of register SM_CLKDIV |
| W | Writer for register SM_CLKDIV |