Module pwm

Expand description

Pulse Width Modulation (PWM)

First you must create a Slices struct which contains all the pwm slices.

use rp2040_hal::{prelude::*, pwm::{InputHighRunning, Slices}};


let mut pac = rp2040_pac::Peripherals::take().unwrap();

// Init PWMs
let pwm_slices = Slices::new(pac.PWM, &mut pac.RESETS);

// Configure PWM4
let mut pwm = pwm_slices.pwm4;
pwm.set_ph_correct();
pwm.enable();

// Set to run when b channel is high
let pwm  = pwm.into_mode::<InputHighRunning>();

Once you have the PWM slice struct, you can add individual pins:

use embedded_hal::pwm::SetDutyCycle;

// Use B channel (which inputs from GPIO 25)
let mut channel_b = pwm.channel_b;
let channel_pin_b = channel_b.input_from(pins.gpio25);

// Use A channel (which outputs to GPIO 24)
let mut channel_a = pwm.channel_a;
let channel_pin_a = channel_a.output_to(pins.gpio24);

// Set duty cycle
channel_a.set_duty_cycle(0x00ff);
let max_duty_cycle = channel_a.max_duty_cycle();
channel_a.set_inverted(); // Invert the output
channel_a.clr_inverted(); // Don't invert the output

The following configuration options are also available:

pwm.set_ph_correct(); // Run in phase correct mode
pwm.clr_ph_correct(); // Don't run in phase correct mode

pwm.set_div_int(1u8); // To set integer part of clock divider
pwm.set_div_frac(0u8); // To set fractional part of clock divider

pwm.get_top(); // To get the TOP register
pwm.set_top(u16::MAX); // To set the TOP register

default_config() sets ph_correct to false, the clock divider to 1, does not invert the output, sets top to 65535, and resets the counter. min_config() leaves those registers in the state they were before it was called (Careful, this can lead to unexpected behavior) It’s recommended to only call min_config() after calling default_config() on a pin that shares a PWM block.

Re-exports§

pub use dyn_slice::*;

Modules§

dyn_slice: Semi-internal enums mostly used in typelevel magic

Structs§

CcFormat: Format for DMA transfers to PWM CC register.
Channel: A Channel from the Pwm subsystem.
CountFallingEdge: Count once with each falling edge detected on the B pin
CountRisingEdge: Count once with each rising edge detected on the B pin
FreeRunning: Counter is free-running, and will count continuously whenever the slice is enabled
InputHighRunning: Count continuously when a high level is detected on the B pin
Slice: Pwm slice
SliceDmaWrite: PWM slice while used for DMA writes.
SliceDmaWriteCc: Type representing DMA access to PWM cc register.
SliceDmaWriteTop: Type representing DMA access to PWM top register.
Slices: Collection of all the individual Slicess
TopFormat: Format for DMA transfers to PWM TOP register.

Enums§

A: Channel A
B: Channel B
Pwm0: Slice ID representing slice 0
Pwm1: Slice ID representing slice 1
Pwm2: Slice ID representing slice 2
Pwm3: Slice ID representing slice 3
Pwm4: Slice ID representing slice 4
Pwm5: Slice ID representing slice 5
Pwm6: Slice ID representing slice 6
Pwm7: Slice ID representing slice 7

Traits§