pub struct BusNs { /* private fields */ }Implementations§
Source§impl BusNs
impl BusNs
Sourcepub const fn cscr(
&self,
) -> &'static ClusterRegisterArray<Reg<Cscr_SPEC, RW>, 7, 0x10>
pub const fn cscr( &self, ) -> &'static ClusterRegisterArray<Reg<Cscr_SPEC, RW>, 7, 0x10>
CS%s Control Register
pub const fn cs1cr(&self) -> &'static Reg<Cscr_SPEC, RW>
pub const fn cs2cr(&self) -> &'static Reg<Cscr_SPEC, RW>
pub const fn cs3cr(&self) -> &'static Reg<Cscr_SPEC, RW>
pub const fn cs4cr(&self) -> &'static Reg<Cscr_SPEC, RW>
pub const fn cs5cr(&self) -> &'static Reg<Cscr_SPEC, RW>
pub const fn cs6cr(&self) -> &'static Reg<Cscr_SPEC, RW>
pub const fn cs7cr(&self) -> &'static Reg<Cscr_SPEC, RW>
Sourcepub const fn busoad(&self) -> &'static Reg<Busoad_SPEC, RW>
pub const fn busoad(&self) -> &'static Reg<Busoad_SPEC, RW>
BUS Operation After Detection Register
Sourcepub const fn busoadpt(&self) -> &'static Reg<Busoadpt_SPEC, RW>
pub const fn busoadpt(&self) -> &'static Reg<Busoadpt_SPEC, RW>
BUS Operation After Detection Protect Register
Sourcepub const fn bussabt1fhbi(&self) -> &'static Reg<Bussabt1Fhbi_SPEC, RW>
pub const fn bussabt1fhbi(&self) -> &'static Reg<Bussabt1Fhbi_SPEC, RW>
Bus Slave Arbitration Control Register 1(x = FHBI, S1BI)
Sourcepub const fn bussabt0flbi(&self) -> &'static Reg<Bussabt0Flbi_SPEC, RW>
pub const fn bussabt0flbi(&self) -> &'static Reg<Bussabt0Flbi_SPEC, RW>
Bus Slave Arbitration Control Register 0
Sourcepub const fn bussabt1s1bi(&self) -> &'static Reg<Bussabt1S1Bi_SPEC, RW>
pub const fn bussabt1s1bi(&self) -> &'static Reg<Bussabt1S1Bi_SPEC, RW>
Bus Slave Arbitration Control Register 1(x = FHBI, S1BI)
Sourcepub const fn bussabt0stbysbi(&self) -> &'static Reg<Bussabt0Stbysbi_SPEC, RW>
pub const fn bussabt0stbysbi(&self) -> &'static Reg<Bussabt0Stbysbi_SPEC, RW>
Bus Slave Arbitration Control Register 0
Sourcepub const fn bussabt0eobi(&self) -> &'static Reg<Bussabt0Eobi_SPEC, RW>
pub const fn bussabt0eobi(&self) -> &'static Reg<Bussabt0Eobi_SPEC, RW>
Bus Slave Arbitration Control Register 0
Sourcepub const fn bussabt0pbbi(&self) -> &'static Reg<Bussabt0Pbbi_SPEC, RW>
pub const fn bussabt0pbbi(&self) -> &'static Reg<Bussabt0Pbbi_SPEC, RW>
Bus Slave Arbitration Control Register 0
Sourcepub const fn bussabt0pabi(&self) -> &'static Reg<Bussabt0Pabi_SPEC, RW>
pub const fn bussabt0pabi(&self) -> &'static Reg<Bussabt0Pabi_SPEC, RW>
Bus Slave Arbitration Control Register 0
Sourcepub const fn bussabt0pibi(&self) -> &'static Reg<Bussabt0Pibi_SPEC, RW>
pub const fn bussabt0pibi(&self) -> &'static Reg<Bussabt0Pibi_SPEC, RW>
Bus Slave Arbitration Control Register 0
Sourcepub const fn bussabt0psbi(&self) -> &'static Reg<Bussabt0Psbi_SPEC, RW>
pub const fn bussabt0psbi(&self) -> &'static Reg<Bussabt0Psbi_SPEC, RW>
Bus Slave Arbitration Control Register 0
Sourcepub const fn buserrrw(
&self,
) -> &'static ClusterRegisterArray<Reg<Buserrrw_SPEC, R>, 2, 0x10>
pub const fn buserrrw( &self, ) -> &'static ClusterRegisterArray<Reg<Buserrrw_SPEC, R>, 2, 0x10>
BUS Error Read Write (n = 4, 5)
pub const fn bus4errrw(&self) -> &'static Reg<Buserrrw_SPEC, R>
pub const fn bus5errrw(&self) -> &'static Reg<Buserrrw_SPEC, R>
Sourcepub const fn buserradd(
&self,
) -> &'static ClusterRegisterArray<Reg<Buserradd_SPEC, R>, 2, 0x10>
pub const fn buserradd( &self, ) -> &'static ClusterRegisterArray<Reg<Buserradd_SPEC, R>, 2, 0x10>
BUS Error Address Register (n = 4, 5)
pub const fn bus4erradd(&self) -> &'static Reg<Buserradd_SPEC, R>
pub const fn bus5erradd(&self) -> &'static Reg<Buserradd_SPEC, R>
Sourcepub const fn bmsaerradd(
&self,
) -> &'static ClusterRegisterArray<Reg<Bmsaerradd_SPEC, R>, 2, 0x10>
pub const fn bmsaerradd( &self, ) -> &'static ClusterRegisterArray<Reg<Bmsaerradd_SPEC, R>, 2, 0x10>
Bus Master Security Attribution Unit Error Address
pub const fn bmsa4erradd(&self) -> &'static Reg<Bmsaerradd_SPEC, R>
pub const fn bmsa5erradd(&self) -> &'static Reg<Bmsaerradd_SPEC, R>
Sourcepub const fn bmsaerrrw(
&self,
) -> &'static ClusterRegisterArray<Reg<Bmsaerrrw_SPEC, R>, 2, 0x10>
pub const fn bmsaerrrw( &self, ) -> &'static ClusterRegisterArray<Reg<Bmsaerrrw_SPEC, R>, 2, 0x10>
BUS Master Security Attribution Unit Error Read Write (n = 4, 5)
pub const fn bmsa4errrw(&self) -> &'static Reg<Bmsaerrrw_SPEC, R>
pub const fn bmsa5errrw(&self) -> &'static Reg<Bmsaerrrw_SPEC, R>
Sourcepub const fn buserrstat(&self) -> &'static Reg<Buserrstat_SPEC, R>
pub const fn buserrstat(&self) -> &'static Reg<Buserrstat_SPEC, R>
BUS Error Status Register
Sourcepub const fn mbwerrstat(&self) -> &'static Reg<Mbwerrstat_SPEC, R>
pub const fn mbwerrstat(&self) -> &'static Reg<Mbwerrstat_SPEC, R>
Master Bufferable Write Error Status Register
Sourcepub const fn mbwerrclr(&self) -> &'static Reg<Mbwerrclr_SPEC, RW>
pub const fn mbwerrclr(&self) -> &'static Reg<Mbwerrclr_SPEC, RW>
Master Bufferable Write Error Clear Register
Sourcepub const fn sbwerrstat(&self) -> &'static Reg<Sbwerrstat_SPEC, R>
pub const fn sbwerrstat(&self) -> &'static Reg<Sbwerrstat_SPEC, R>
Slave Bufferable Write Error Status Register
Trait Implementations§
impl Copy for BusNs
impl Eq for BusNs
impl Send for BusNs
Bus Control