ra8e1_pac/
bus_ns.rs

1/*
2DISCLAIMER
3This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
4No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
5applicable laws, including copyright laws.
6THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
7OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
8NON-INFRINGEMENT.  ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
9LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
10INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
11ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
12Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
13of this software. By using this software, you agree to the additional terms and conditions found by accessing the
14following link:
15http://www.renesas.com/disclaimer
16
17*/
18// Generated from SVD 1.00.01, with svd2pac 0.6.0 on Thu, 24 Jul 2025 04:53:56 +0000
19
20#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"Bus Control"]
28unsafe impl ::core::marker::Send for super::BusNs {}
29unsafe impl ::core::marker::Sync for super::BusNs {}
30impl super::BusNs {
31    #[allow(unused)]
32    #[inline(always)]
33    pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34        self.ptr
35    }
36
37    #[doc = "CS0 Control Register"]
38    #[inline(always)]
39    pub const fn cs0cr(&self) -> &'static crate::common::Reg<self::Cs0Cr_SPEC, crate::common::RW> {
40        unsafe {
41            crate::common::Reg::<self::Cs0Cr_SPEC, crate::common::RW>::from_ptr(
42                self._svd2pac_as_ptr().add(2050usize),
43            )
44        }
45    }
46
47    #[doc = "CS%s Control Register"]
48    #[inline(always)]
49    pub const fn cscr(
50        &self,
51    ) -> &'static crate::common::ClusterRegisterArray<
52        crate::common::Reg<self::Cscr_SPEC, crate::common::RW>,
53        7,
54        0x10,
55    > {
56        unsafe {
57            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x812usize))
58        }
59    }
60    #[inline(always)]
61    pub const fn cs1cr(&self) -> &'static crate::common::Reg<self::Cscr_SPEC, crate::common::RW> {
62        unsafe {
63            crate::common::Reg::<self::Cscr_SPEC, crate::common::RW>::from_ptr(
64                self._svd2pac_as_ptr().add(0x812usize),
65            )
66        }
67    }
68    #[inline(always)]
69    pub const fn cs2cr(&self) -> &'static crate::common::Reg<self::Cscr_SPEC, crate::common::RW> {
70        unsafe {
71            crate::common::Reg::<self::Cscr_SPEC, crate::common::RW>::from_ptr(
72                self._svd2pac_as_ptr().add(0x822usize),
73            )
74        }
75    }
76    #[inline(always)]
77    pub const fn cs3cr(&self) -> &'static crate::common::Reg<self::Cscr_SPEC, crate::common::RW> {
78        unsafe {
79            crate::common::Reg::<self::Cscr_SPEC, crate::common::RW>::from_ptr(
80                self._svd2pac_as_ptr().add(0x832usize),
81            )
82        }
83    }
84    #[inline(always)]
85    pub const fn cs4cr(&self) -> &'static crate::common::Reg<self::Cscr_SPEC, crate::common::RW> {
86        unsafe {
87            crate::common::Reg::<self::Cscr_SPEC, crate::common::RW>::from_ptr(
88                self._svd2pac_as_ptr().add(0x842usize),
89            )
90        }
91    }
92    #[inline(always)]
93    pub const fn cs5cr(&self) -> &'static crate::common::Reg<self::Cscr_SPEC, crate::common::RW> {
94        unsafe {
95            crate::common::Reg::<self::Cscr_SPEC, crate::common::RW>::from_ptr(
96                self._svd2pac_as_ptr().add(0x852usize),
97            )
98        }
99    }
100    #[inline(always)]
101    pub const fn cs6cr(&self) -> &'static crate::common::Reg<self::Cscr_SPEC, crate::common::RW> {
102        unsafe {
103            crate::common::Reg::<self::Cscr_SPEC, crate::common::RW>::from_ptr(
104                self._svd2pac_as_ptr().add(0x862usize),
105            )
106        }
107    }
108    #[inline(always)]
109    pub const fn cs7cr(&self) -> &'static crate::common::Reg<self::Cscr_SPEC, crate::common::RW> {
110        unsafe {
111            crate::common::Reg::<self::Cscr_SPEC, crate::common::RW>::from_ptr(
112                self._svd2pac_as_ptr().add(0x872usize),
113            )
114        }
115    }
116
117    #[doc = "BUS Operation After Detection Register"]
118    #[inline(always)]
119    pub const fn busoad(
120        &self,
121    ) -> &'static crate::common::Reg<self::Busoad_SPEC, crate::common::RW> {
122        unsafe {
123            crate::common::Reg::<self::Busoad_SPEC, crate::common::RW>::from_ptr(
124                self._svd2pac_as_ptr().add(4096usize),
125            )
126        }
127    }
128
129    #[doc = "BUS Operation After Detection Protect Register"]
130    #[inline(always)]
131    pub const fn busoadpt(
132        &self,
133    ) -> &'static crate::common::Reg<self::Busoadpt_SPEC, crate::common::RW> {
134        unsafe {
135            crate::common::Reg::<self::Busoadpt_SPEC, crate::common::RW>::from_ptr(
136                self._svd2pac_as_ptr().add(4100usize),
137            )
138        }
139    }
140
141    #[doc = "Bus Slave Arbitration Control Register 1(x = FHBI, S1BI)"]
142    #[inline(always)]
143    pub const fn bussabt1fhbi(
144        &self,
145    ) -> &'static crate::common::Reg<self::Bussabt1Fhbi_SPEC, crate::common::RW> {
146        unsafe {
147            crate::common::Reg::<self::Bussabt1Fhbi_SPEC, crate::common::RW>::from_ptr(
148                self._svd2pac_as_ptr().add(4608usize),
149            )
150        }
151    }
152
153    #[doc = "Bus Slave Arbitration Control Register 0"]
154    #[inline(always)]
155    pub const fn bussabt0flbi(
156        &self,
157    ) -> &'static crate::common::Reg<self::Bussabt0Flbi_SPEC, crate::common::RW> {
158        unsafe {
159            crate::common::Reg::<self::Bussabt0Flbi_SPEC, crate::common::RW>::from_ptr(
160                self._svd2pac_as_ptr().add(4624usize),
161            )
162        }
163    }
164
165    #[doc = "Bus Slave Arbitration Control Register 1(x = FHBI, S1BI)"]
166    #[inline(always)]
167    pub const fn bussabt1s1bi(
168        &self,
169    ) -> &'static crate::common::Reg<self::Bussabt1S1Bi_SPEC, crate::common::RW> {
170        unsafe {
171            crate::common::Reg::<self::Bussabt1S1Bi_SPEC, crate::common::RW>::from_ptr(
172                self._svd2pac_as_ptr().add(4640usize),
173            )
174        }
175    }
176
177    #[doc = "Bus Slave Arbitration Control Register 0"]
178    #[inline(always)]
179    pub const fn bussabt0stbysbi(
180        &self,
181    ) -> &'static crate::common::Reg<self::Bussabt0Stbysbi_SPEC, crate::common::RW> {
182        unsafe {
183            crate::common::Reg::<self::Bussabt0Stbysbi_SPEC, crate::common::RW>::from_ptr(
184                self._svd2pac_as_ptr().add(4680usize),
185            )
186        }
187    }
188
189    #[doc = "Bus Slave Arbitration Control Register 0"]
190    #[inline(always)]
191    pub const fn bussabt0eobi(
192        &self,
193    ) -> &'static crate::common::Reg<self::Bussabt0Eobi_SPEC, crate::common::RW> {
194        unsafe {
195            crate::common::Reg::<self::Bussabt0Eobi_SPEC, crate::common::RW>::from_ptr(
196                self._svd2pac_as_ptr().add(4696usize),
197            )
198        }
199    }
200
201    #[doc = "Bus Slave Arbitration Control Register 0"]
202    #[inline(always)]
203    pub const fn bussabt0pbbi(
204        &self,
205    ) -> &'static crate::common::Reg<self::Bussabt0Pbbi_SPEC, crate::common::RW> {
206        unsafe {
207            crate::common::Reg::<self::Bussabt0Pbbi_SPEC, crate::common::RW>::from_ptr(
208                self._svd2pac_as_ptr().add(4704usize),
209            )
210        }
211    }
212
213    #[doc = "Bus Slave Arbitration Control Register 0"]
214    #[inline(always)]
215    pub const fn bussabt0pabi(
216        &self,
217    ) -> &'static crate::common::Reg<self::Bussabt0Pabi_SPEC, crate::common::RW> {
218        unsafe {
219            crate::common::Reg::<self::Bussabt0Pabi_SPEC, crate::common::RW>::from_ptr(
220                self._svd2pac_as_ptr().add(4712usize),
221            )
222        }
223    }
224
225    #[doc = "Bus Slave Arbitration Control Register 0"]
226    #[inline(always)]
227    pub const fn bussabt0pibi(
228        &self,
229    ) -> &'static crate::common::Reg<self::Bussabt0Pibi_SPEC, crate::common::RW> {
230        unsafe {
231            crate::common::Reg::<self::Bussabt0Pibi_SPEC, crate::common::RW>::from_ptr(
232                self._svd2pac_as_ptr().add(4720usize),
233            )
234        }
235    }
236
237    #[doc = "Bus Slave Arbitration Control Register 0"]
238    #[inline(always)]
239    pub const fn bussabt0psbi(
240        &self,
241    ) -> &'static crate::common::Reg<self::Bussabt0Psbi_SPEC, crate::common::RW> {
242        unsafe {
243            crate::common::Reg::<self::Bussabt0Psbi_SPEC, crate::common::RW>::from_ptr(
244                self._svd2pac_as_ptr().add(4728usize),
245            )
246        }
247    }
248
249    #[doc = "Bus Divider Bypass Register"]
250    #[inline(always)]
251    pub const fn busdivbyp(
252        &self,
253    ) -> &'static crate::common::Reg<self::Busdivbyp_SPEC, crate::common::RW> {
254        unsafe {
255            crate::common::Reg::<self::Busdivbyp_SPEC, crate::common::RW>::from_ptr(
256                self._svd2pac_as_ptr().add(4864usize),
257            )
258        }
259    }
260
261    #[doc = "BUS Error Read Write (n = 4, 5)"]
262    #[inline(always)]
263    pub const fn buserrrw(
264        &self,
265    ) -> &'static crate::common::ClusterRegisterArray<
266        crate::common::Reg<self::Buserrrw_SPEC, crate::common::R>,
267        2,
268        0x10,
269    > {
270        unsafe {
271            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x1804usize))
272        }
273    }
274    #[inline(always)]
275    pub const fn bus4errrw(
276        &self,
277    ) -> &'static crate::common::Reg<self::Buserrrw_SPEC, crate::common::R> {
278        unsafe {
279            crate::common::Reg::<self::Buserrrw_SPEC, crate::common::R>::from_ptr(
280                self._svd2pac_as_ptr().add(0x1804usize),
281            )
282        }
283    }
284    #[inline(always)]
285    pub const fn bus5errrw(
286        &self,
287    ) -> &'static crate::common::Reg<self::Buserrrw_SPEC, crate::common::R> {
288        unsafe {
289            crate::common::Reg::<self::Buserrrw_SPEC, crate::common::R>::from_ptr(
290                self._svd2pac_as_ptr().add(0x1814usize),
291            )
292        }
293    }
294
295    #[doc = "BUS Error Address Register (n = 4, 5)"]
296    #[inline(always)]
297    pub const fn buserradd(
298        &self,
299    ) -> &'static crate::common::ClusterRegisterArray<
300        crate::common::Reg<self::Buserradd_SPEC, crate::common::R>,
301        2,
302        0x10,
303    > {
304        unsafe {
305            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x1830usize))
306        }
307    }
308    #[inline(always)]
309    pub const fn bus4erradd(
310        &self,
311    ) -> &'static crate::common::Reg<self::Buserradd_SPEC, crate::common::R> {
312        unsafe {
313            crate::common::Reg::<self::Buserradd_SPEC, crate::common::R>::from_ptr(
314                self._svd2pac_as_ptr().add(0x1830usize),
315            )
316        }
317    }
318    #[inline(always)]
319    pub const fn bus5erradd(
320        &self,
321    ) -> &'static crate::common::Reg<self::Buserradd_SPEC, crate::common::R> {
322        unsafe {
323            crate::common::Reg::<self::Buserradd_SPEC, crate::common::R>::from_ptr(
324                self._svd2pac_as_ptr().add(0x1840usize),
325            )
326        }
327    }
328
329    #[doc = "Bus Master Security Attribution Unit Error Address"]
330    #[inline(always)]
331    pub const fn bmsaerradd(
332        &self,
333    ) -> &'static crate::common::ClusterRegisterArray<
334        crate::common::Reg<self::Bmsaerradd_SPEC, crate::common::R>,
335        2,
336        0x10,
337    > {
338        unsafe {
339            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x1900usize))
340        }
341    }
342    #[inline(always)]
343    pub const fn bmsa4erradd(
344        &self,
345    ) -> &'static crate::common::Reg<self::Bmsaerradd_SPEC, crate::common::R> {
346        unsafe {
347            crate::common::Reg::<self::Bmsaerradd_SPEC, crate::common::R>::from_ptr(
348                self._svd2pac_as_ptr().add(0x1900usize),
349            )
350        }
351    }
352    #[inline(always)]
353    pub const fn bmsa5erradd(
354        &self,
355    ) -> &'static crate::common::Reg<self::Bmsaerradd_SPEC, crate::common::R> {
356        unsafe {
357            crate::common::Reg::<self::Bmsaerradd_SPEC, crate::common::R>::from_ptr(
358                self._svd2pac_as_ptr().add(0x1910usize),
359            )
360        }
361    }
362
363    #[doc = "BUS Master Security Attribution Unit Error Read Write (n = 4, 5)"]
364    #[inline(always)]
365    pub const fn bmsaerrrw(
366        &self,
367    ) -> &'static crate::common::ClusterRegisterArray<
368        crate::common::Reg<self::Bmsaerrrw_SPEC, crate::common::R>,
369        2,
370        0x10,
371    > {
372        unsafe {
373            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x1904usize))
374        }
375    }
376    #[inline(always)]
377    pub const fn bmsa4errrw(
378        &self,
379    ) -> &'static crate::common::Reg<self::Bmsaerrrw_SPEC, crate::common::R> {
380        unsafe {
381            crate::common::Reg::<self::Bmsaerrrw_SPEC, crate::common::R>::from_ptr(
382                self._svd2pac_as_ptr().add(0x1904usize),
383            )
384        }
385    }
386    #[inline(always)]
387    pub const fn bmsa5errrw(
388        &self,
389    ) -> &'static crate::common::Reg<self::Bmsaerrrw_SPEC, crate::common::R> {
390        unsafe {
391            crate::common::Reg::<self::Bmsaerrrw_SPEC, crate::common::R>::from_ptr(
392                self._svd2pac_as_ptr().add(0x1914usize),
393            )
394        }
395    }
396
397    #[doc = "BUS Error Status Register"]
398    #[inline(always)]
399    pub const fn buserrstat(
400        &self,
401    ) -> &'static crate::common::Reg<self::Buserrstat_SPEC, crate::common::R> {
402        unsafe {
403            crate::common::Reg::<self::Buserrstat_SPEC, crate::common::R>::from_ptr(
404                self._svd2pac_as_ptr().add(6800usize),
405            )
406        }
407    }
408
409    #[doc = "BUS Error Clear Register"]
410    #[inline(always)]
411    pub const fn buserrclr(
412        &self,
413    ) -> &'static crate::common::Reg<self::Buserrclr_SPEC, crate::common::RW> {
414        unsafe {
415            crate::common::Reg::<self::Buserrclr_SPEC, crate::common::RW>::from_ptr(
416                self._svd2pac_as_ptr().add(6808usize),
417            )
418        }
419    }
420
421    #[doc = "Master Bufferable Write Error Status Register"]
422    #[inline(always)]
423    pub const fn mbwerrstat(
424        &self,
425    ) -> &'static crate::common::Reg<self::Mbwerrstat_SPEC, crate::common::R> {
426        unsafe {
427            crate::common::Reg::<self::Mbwerrstat_SPEC, crate::common::R>::from_ptr(
428                self._svd2pac_as_ptr().add(6912usize),
429            )
430        }
431    }
432
433    #[doc = "Master Bufferable Write Error Clear Register"]
434    #[inline(always)]
435    pub const fn mbwerrclr(
436        &self,
437    ) -> &'static crate::common::Reg<self::Mbwerrclr_SPEC, crate::common::RW> {
438        unsafe {
439            crate::common::Reg::<self::Mbwerrclr_SPEC, crate::common::RW>::from_ptr(
440                self._svd2pac_as_ptr().add(6920usize),
441            )
442        }
443    }
444
445    #[doc = "Slave Bufferable Write Error Status Register"]
446    #[inline(always)]
447    pub const fn sbwerrstat(
448        &self,
449    ) -> &'static crate::common::Reg<self::Sbwerrstat_SPEC, crate::common::R> {
450        unsafe {
451            crate::common::Reg::<self::Sbwerrstat_SPEC, crate::common::R>::from_ptr(
452                self._svd2pac_as_ptr().add(6944usize),
453            )
454        }
455    }
456
457    #[doc = "Slave Bufferable Write Error Clear Register"]
458    #[inline(always)]
459    pub const fn sbwerrclr(
460        &self,
461    ) -> &'static crate::common::Reg<self::Sbwerrclr_SPEC, crate::common::RW> {
462        unsafe {
463            crate::common::Reg::<self::Sbwerrclr_SPEC, crate::common::RW>::from_ptr(
464                self._svd2pac_as_ptr().add(6952usize),
465            )
466        }
467    }
468}
469#[doc(hidden)]
470#[derive(Copy, Clone, Eq, PartialEq)]
471pub struct Cs0Cr_SPEC;
472impl crate::sealed::RegSpec for Cs0Cr_SPEC {
473    type DataType = u16;
474}
475
476#[doc = "CS0 Control Register"]
477pub type Cs0Cr = crate::RegValueT<Cs0Cr_SPEC>;
478
479impl Cs0Cr {
480    #[doc = "Operation Enable"]
481    #[inline(always)]
482    pub fn exenb(
483        self,
484    ) -> crate::common::RegisterField<
485        0,
486        0x1,
487        1,
488        0,
489        cs0cr::Exenb,
490        cs0cr::Exenb,
491        Cs0Cr_SPEC,
492        crate::common::RW,
493    > {
494        crate::common::RegisterField::<
495            0,
496            0x1,
497            1,
498            0,
499            cs0cr::Exenb,
500            cs0cr::Exenb,
501            Cs0Cr_SPEC,
502            crate::common::RW,
503        >::from_register(self, 0)
504    }
505
506    #[doc = "External Bus Width Select"]
507    #[inline(always)]
508    pub fn bsize(
509        self,
510    ) -> crate::common::RegisterField<
511        4,
512        0x3,
513        1,
514        0,
515        cs0cr::Bsize,
516        cs0cr::Bsize,
517        Cs0Cr_SPEC,
518        crate::common::RW,
519    > {
520        crate::common::RegisterField::<
521            4,
522            0x3,
523            1,
524            0,
525            cs0cr::Bsize,
526            cs0cr::Bsize,
527            Cs0Cr_SPEC,
528            crate::common::RW,
529        >::from_register(self, 0)
530    }
531
532    #[doc = "Endian Mode"]
533    #[inline(always)]
534    pub fn emode(
535        self,
536    ) -> crate::common::RegisterField<
537        8,
538        0x1,
539        1,
540        0,
541        cs0cr::Emode,
542        cs0cr::Emode,
543        Cs0Cr_SPEC,
544        crate::common::RW,
545    > {
546        crate::common::RegisterField::<
547            8,
548            0x1,
549            1,
550            0,
551            cs0cr::Emode,
552            cs0cr::Emode,
553            Cs0Cr_SPEC,
554            crate::common::RW,
555        >::from_register(self, 0)
556    }
557
558    #[doc = "Address/Data Multiplexed I/O Interface Select"]
559    #[inline(always)]
560    pub fn mpxen(
561        self,
562    ) -> crate::common::RegisterField<
563        12,
564        0x1,
565        1,
566        0,
567        cs0cr::Mpxen,
568        cs0cr::Mpxen,
569        Cs0Cr_SPEC,
570        crate::common::RW,
571    > {
572        crate::common::RegisterField::<
573            12,
574            0x1,
575            1,
576            0,
577            cs0cr::Mpxen,
578            cs0cr::Mpxen,
579            Cs0Cr_SPEC,
580            crate::common::RW,
581        >::from_register(self, 0)
582    }
583}
584impl ::core::default::Default for Cs0Cr {
585    #[inline(always)]
586    fn default() -> Cs0Cr {
587        <crate::RegValueT<Cs0Cr_SPEC> as RegisterValue<_>>::new(1)
588    }
589}
590pub mod cs0cr {
591
592    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
593    pub struct Exenb_SPEC;
594    pub type Exenb = crate::EnumBitfieldStruct<u8, Exenb_SPEC>;
595    impl Exenb {
596        #[doc = "Disable operation"]
597        pub const _0: Self = Self::new(0);
598
599        #[doc = "Enable operation"]
600        pub const _1: Self = Self::new(1);
601    }
602    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
603    pub struct Bsize_SPEC;
604    pub type Bsize = crate::EnumBitfieldStruct<u8, Bsize_SPEC>;
605    impl Bsize {
606        #[doc = "16-bit bus space"]
607        pub const _00: Self = Self::new(0);
608
609        #[doc = "8-bit bus space"]
610        pub const _10: Self = Self::new(2);
611
612        #[doc = "Setting prohibited"]
613        pub const OTHERS: Self = Self::new(0);
614    }
615    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
616    pub struct Emode_SPEC;
617    pub type Emode = crate::EnumBitfieldStruct<u8, Emode_SPEC>;
618    impl Emode {
619        #[doc = "Little endian"]
620        pub const _0: Self = Self::new(0);
621
622        #[doc = "Big endian"]
623        pub const _1: Self = Self::new(1);
624    }
625    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
626    pub struct Mpxen_SPEC;
627    pub type Mpxen = crate::EnumBitfieldStruct<u8, Mpxen_SPEC>;
628    impl Mpxen {
629        #[doc = "Separate bus interface is selected for area n."]
630        pub const _0: Self = Self::new(0);
631
632        #[doc = "Address/data multiplexed I/O interface is selected for area n."]
633        pub const _1: Self = Self::new(1);
634    }
635}
636#[doc(hidden)]
637#[derive(Copy, Clone, Eq, PartialEq)]
638pub struct Cscr_SPEC;
639impl crate::sealed::RegSpec for Cscr_SPEC {
640    type DataType = u16;
641}
642
643#[doc = "CS%s Control Register"]
644pub type Cscr = crate::RegValueT<Cscr_SPEC>;
645
646impl Cscr {
647    #[doc = "Operation Enable"]
648    #[inline(always)]
649    pub fn exenb(
650        self,
651    ) -> crate::common::RegisterField<
652        0,
653        0x1,
654        1,
655        0,
656        cscr::Exenb,
657        cscr::Exenb,
658        Cscr_SPEC,
659        crate::common::RW,
660    > {
661        crate::common::RegisterField::<
662            0,
663            0x1,
664            1,
665            0,
666            cscr::Exenb,
667            cscr::Exenb,
668            Cscr_SPEC,
669            crate::common::RW,
670        >::from_register(self, 0)
671    }
672
673    #[doc = "External Bus Width Select"]
674    #[inline(always)]
675    pub fn bsize(
676        self,
677    ) -> crate::common::RegisterField<
678        4,
679        0x3,
680        1,
681        0,
682        cscr::Bsize,
683        cscr::Bsize,
684        Cscr_SPEC,
685        crate::common::RW,
686    > {
687        crate::common::RegisterField::<
688            4,
689            0x3,
690            1,
691            0,
692            cscr::Bsize,
693            cscr::Bsize,
694            Cscr_SPEC,
695            crate::common::RW,
696        >::from_register(self, 0)
697    }
698
699    #[doc = "Endian Mode"]
700    #[inline(always)]
701    pub fn emode(
702        self,
703    ) -> crate::common::RegisterField<
704        8,
705        0x1,
706        1,
707        0,
708        cscr::Emode,
709        cscr::Emode,
710        Cscr_SPEC,
711        crate::common::RW,
712    > {
713        crate::common::RegisterField::<
714            8,
715            0x1,
716            1,
717            0,
718            cscr::Emode,
719            cscr::Emode,
720            Cscr_SPEC,
721            crate::common::RW,
722        >::from_register(self, 0)
723    }
724
725    #[doc = "Address/Data Multiplexed I/O Interface Select"]
726    #[inline(always)]
727    pub fn mpxen(
728        self,
729    ) -> crate::common::RegisterField<
730        12,
731        0x1,
732        1,
733        0,
734        cscr::Mpxen,
735        cscr::Mpxen,
736        Cscr_SPEC,
737        crate::common::RW,
738    > {
739        crate::common::RegisterField::<
740            12,
741            0x1,
742            1,
743            0,
744            cscr::Mpxen,
745            cscr::Mpxen,
746            Cscr_SPEC,
747            crate::common::RW,
748        >::from_register(self, 0)
749    }
750}
751impl ::core::default::Default for Cscr {
752    #[inline(always)]
753    fn default() -> Cscr {
754        <crate::RegValueT<Cscr_SPEC> as RegisterValue<_>>::new(0)
755    }
756}
757pub mod cscr {
758
759    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
760    pub struct Exenb_SPEC;
761    pub type Exenb = crate::EnumBitfieldStruct<u8, Exenb_SPEC>;
762    impl Exenb {
763        #[doc = "Disable operation"]
764        pub const _0: Self = Self::new(0);
765
766        #[doc = "Enable operation"]
767        pub const _1: Self = Self::new(1);
768    }
769    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
770    pub struct Bsize_SPEC;
771    pub type Bsize = crate::EnumBitfieldStruct<u8, Bsize_SPEC>;
772    impl Bsize {
773        #[doc = "16-bit bus space"]
774        pub const _00: Self = Self::new(0);
775
776        #[doc = "8-bit bus space"]
777        pub const _10: Self = Self::new(2);
778
779        #[doc = "Setting prohibited"]
780        pub const OTHERS: Self = Self::new(0);
781    }
782    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
783    pub struct Emode_SPEC;
784    pub type Emode = crate::EnumBitfieldStruct<u8, Emode_SPEC>;
785    impl Emode {
786        #[doc = "Little endian"]
787        pub const _0: Self = Self::new(0);
788
789        #[doc = "Big endian"]
790        pub const _1: Self = Self::new(1);
791    }
792    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
793    pub struct Mpxen_SPEC;
794    pub type Mpxen = crate::EnumBitfieldStruct<u8, Mpxen_SPEC>;
795    impl Mpxen {
796        #[doc = "Separate bus interface is selected for area n."]
797        pub const _0: Self = Self::new(0);
798
799        #[doc = "Address/data multiplexed I/O interface is selected for area n."]
800        pub const _1: Self = Self::new(1);
801    }
802}
803#[doc(hidden)]
804#[derive(Copy, Clone, Eq, PartialEq)]
805pub struct Busoad_SPEC;
806impl crate::sealed::RegSpec for Busoad_SPEC {
807    type DataType = u16;
808}
809
810#[doc = "BUS Operation After Detection Register"]
811pub type Busoad = crate::RegValueT<Busoad_SPEC>;
812
813impl Busoad {
814    #[doc = "Illegal address access error operation after detection"]
815    #[inline(always)]
816    pub fn ilerroad(
817        self,
818    ) -> crate::common::RegisterFieldBool<0, 1, 0, Busoad_SPEC, crate::common::RW> {
819        crate::common::RegisterFieldBool::<0, 1, 0, Busoad_SPEC, crate::common::RW>::from_register(
820            self, 0,
821        )
822    }
823
824    #[doc = "Slave bus error operation after detection"]
825    #[inline(always)]
826    pub fn slerroad(
827        self,
828    ) -> crate::common::RegisterFieldBool<1, 1, 0, Busoad_SPEC, crate::common::RW> {
829        crate::common::RegisterFieldBool::<1, 1, 0, Busoad_SPEC, crate::common::RW>::from_register(
830            self, 0,
831        )
832    }
833
834    #[doc = "Bufferable write error operation after detection"]
835    #[inline(always)]
836    pub fn bwerroad(
837        self,
838    ) -> crate::common::RegisterFieldBool<2, 1, 0, Busoad_SPEC, crate::common::RW> {
839        crate::common::RegisterFieldBool::<2, 1, 0, Busoad_SPEC, crate::common::RW>::from_register(
840            self, 0,
841        )
842    }
843}
844impl ::core::default::Default for Busoad {
845    #[inline(always)]
846    fn default() -> Busoad {
847        <crate::RegValueT<Busoad_SPEC> as RegisterValue<_>>::new(0)
848    }
849}
850
851#[doc(hidden)]
852#[derive(Copy, Clone, Eq, PartialEq)]
853pub struct Busoadpt_SPEC;
854impl crate::sealed::RegSpec for Busoadpt_SPEC {
855    type DataType = u16;
856}
857
858#[doc = "BUS Operation After Detection Protect Register"]
859pub type Busoadpt = crate::RegValueT<Busoadpt_SPEC>;
860
861impl Busoadpt {
862    #[doc = "Protection of register"]
863    #[inline(always)]
864    pub fn protect(
865        self,
866    ) -> crate::common::RegisterField<
867        0,
868        0x1,
869        1,
870        0,
871        busoadpt::Protect,
872        busoadpt::Protect,
873        Busoadpt_SPEC,
874        crate::common::RW,
875    > {
876        crate::common::RegisterField::<
877            0,
878            0x1,
879            1,
880            0,
881            busoadpt::Protect,
882            busoadpt::Protect,
883            Busoadpt_SPEC,
884            crate::common::RW,
885        >::from_register(self, 0)
886    }
887
888    #[doc = "Key code"]
889    #[inline(always)]
890    pub fn key(
891        self,
892    ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Busoadpt_SPEC, crate::common::W> {
893        crate::common::RegisterField::<8,0xff,1,0,u8,u8,Busoadpt_SPEC,crate::common::W>::from_register(self,0)
894    }
895}
896impl ::core::default::Default for Busoadpt {
897    #[inline(always)]
898    fn default() -> Busoadpt {
899        <crate::RegValueT<Busoadpt_SPEC> as RegisterValue<_>>::new(0)
900    }
901}
902pub mod busoadpt {
903
904    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
905    pub struct Protect_SPEC;
906    pub type Protect = crate::EnumBitfieldStruct<u8, Protect_SPEC>;
907    impl Protect {
908        #[doc = "BUSOAD register writing is possible."]
909        pub const _0: Self = Self::new(0);
910
911        #[doc = "BUSOAD register writing is protected. Read is possible."]
912        pub const _1: Self = Self::new(1);
913    }
914}
915#[doc(hidden)]
916#[derive(Copy, Clone, Eq, PartialEq)]
917pub struct Bussabt1Fhbi_SPEC;
918impl crate::sealed::RegSpec for Bussabt1Fhbi_SPEC {
919    type DataType = u32;
920}
921
922#[doc = "Bus Slave Arbitration Control Register 1(x = FHBI, S1BI)"]
923pub type Bussabt1Fhbi = crate::RegValueT<Bussabt1Fhbi_SPEC>;
924
925impl Bussabt1Fhbi {
926    #[doc = "Arbitration Select for <slave>"]
927    #[inline(always)]
928    pub fn arbs(
929        self,
930    ) -> crate::common::RegisterField<
931        0,
932        0x3,
933        1,
934        0,
935        bussabt1fhbi::Arbs,
936        bussabt1fhbi::Arbs,
937        Bussabt1Fhbi_SPEC,
938        crate::common::RW,
939    > {
940        crate::common::RegisterField::<
941            0,
942            0x3,
943            1,
944            0,
945            bussabt1fhbi::Arbs,
946            bussabt1fhbi::Arbs,
947            Bussabt1Fhbi_SPEC,
948            crate::common::RW,
949        >::from_register(self, 0)
950    }
951}
952impl ::core::default::Default for Bussabt1Fhbi {
953    #[inline(always)]
954    fn default() -> Bussabt1Fhbi {
955        <crate::RegValueT<Bussabt1Fhbi_SPEC> as RegisterValue<_>>::new(0)
956    }
957}
958pub mod bussabt1fhbi {
959
960    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
961    pub struct Arbs_SPEC;
962    pub type Arbs = crate::EnumBitfieldStruct<u8, Arbs_SPEC>;
963    impl Arbs {
964        #[doc = "Fixed priority"]
965        pub const _00: Self = Self::new(0);
966
967        #[doc = "Setting prohibited"]
968        pub const _01: Self = Self::new(1);
969
970        #[doc = "Combination of round-robin and fixed priority"]
971        pub const _10: Self = Self::new(2);
972
973        #[doc = "Round-robin"]
974        pub const _11: Self = Self::new(3);
975    }
976}
977#[doc(hidden)]
978#[derive(Copy, Clone, Eq, PartialEq)]
979pub struct Bussabt0Flbi_SPEC;
980impl crate::sealed::RegSpec for Bussabt0Flbi_SPEC {
981    type DataType = u32;
982}
983
984#[doc = "Bus Slave Arbitration Control Register 0"]
985pub type Bussabt0Flbi = crate::RegValueT<Bussabt0Flbi_SPEC>;
986
987impl Bussabt0Flbi {
988    #[doc = "Arbitration Select for <slave>"]
989    #[inline(always)]
990    pub fn arbs(
991        self,
992    ) -> crate::common::RegisterField<
993        0,
994        0x1,
995        1,
996        0,
997        bussabt0flbi::Arbs,
998        bussabt0flbi::Arbs,
999        Bussabt0Flbi_SPEC,
1000        crate::common::RW,
1001    > {
1002        crate::common::RegisterField::<
1003            0,
1004            0x1,
1005            1,
1006            0,
1007            bussabt0flbi::Arbs,
1008            bussabt0flbi::Arbs,
1009            Bussabt0Flbi_SPEC,
1010            crate::common::RW,
1011        >::from_register(self, 0)
1012    }
1013}
1014impl ::core::default::Default for Bussabt0Flbi {
1015    #[inline(always)]
1016    fn default() -> Bussabt0Flbi {
1017        <crate::RegValueT<Bussabt0Flbi_SPEC> as RegisterValue<_>>::new(0)
1018    }
1019}
1020pub mod bussabt0flbi {
1021
1022    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1023    pub struct Arbs_SPEC;
1024    pub type Arbs = crate::EnumBitfieldStruct<u8, Arbs_SPEC>;
1025    impl Arbs {
1026        #[doc = "Fixed priority"]
1027        pub const _0: Self = Self::new(0);
1028
1029        #[doc = "Round-robin"]
1030        pub const _1: Self = Self::new(1);
1031    }
1032}
1033#[doc(hidden)]
1034#[derive(Copy, Clone, Eq, PartialEq)]
1035pub struct Bussabt1S1Bi_SPEC;
1036impl crate::sealed::RegSpec for Bussabt1S1Bi_SPEC {
1037    type DataType = u32;
1038}
1039
1040#[doc = "Bus Slave Arbitration Control Register 1(x = FHBI, S1BI)"]
1041pub type Bussabt1S1Bi = crate::RegValueT<Bussabt1S1Bi_SPEC>;
1042
1043impl Bussabt1S1Bi {
1044    #[doc = "Arbitration Select for <slave>"]
1045    #[inline(always)]
1046    pub fn arbs(
1047        self,
1048    ) -> crate::common::RegisterField<
1049        0,
1050        0x3,
1051        1,
1052        0,
1053        bussabt1s1bi::Arbs,
1054        bussabt1s1bi::Arbs,
1055        Bussabt1S1Bi_SPEC,
1056        crate::common::RW,
1057    > {
1058        crate::common::RegisterField::<
1059            0,
1060            0x3,
1061            1,
1062            0,
1063            bussabt1s1bi::Arbs,
1064            bussabt1s1bi::Arbs,
1065            Bussabt1S1Bi_SPEC,
1066            crate::common::RW,
1067        >::from_register(self, 0)
1068    }
1069}
1070impl ::core::default::Default for Bussabt1S1Bi {
1071    #[inline(always)]
1072    fn default() -> Bussabt1S1Bi {
1073        <crate::RegValueT<Bussabt1S1Bi_SPEC> as RegisterValue<_>>::new(0)
1074    }
1075}
1076pub mod bussabt1s1bi {
1077
1078    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1079    pub struct Arbs_SPEC;
1080    pub type Arbs = crate::EnumBitfieldStruct<u8, Arbs_SPEC>;
1081    impl Arbs {
1082        #[doc = "Fixed priority"]
1083        pub const _00: Self = Self::new(0);
1084
1085        #[doc = "Setting prohibited"]
1086        pub const _01: Self = Self::new(1);
1087
1088        #[doc = "Combination of round-robin and fixed priority"]
1089        pub const _10: Self = Self::new(2);
1090
1091        #[doc = "Round-robin"]
1092        pub const _11: Self = Self::new(3);
1093    }
1094}
1095#[doc(hidden)]
1096#[derive(Copy, Clone, Eq, PartialEq)]
1097pub struct Bussabt0Stbysbi_SPEC;
1098impl crate::sealed::RegSpec for Bussabt0Stbysbi_SPEC {
1099    type DataType = u32;
1100}
1101
1102#[doc = "Bus Slave Arbitration Control Register 0"]
1103pub type Bussabt0Stbysbi = crate::RegValueT<Bussabt0Stbysbi_SPEC>;
1104
1105impl Bussabt0Stbysbi {
1106    #[doc = "Arbitration Select for <slave>"]
1107    #[inline(always)]
1108    pub fn arbs(
1109        self,
1110    ) -> crate::common::RegisterField<
1111        0,
1112        0x1,
1113        1,
1114        0,
1115        bussabt0stbysbi::Arbs,
1116        bussabt0stbysbi::Arbs,
1117        Bussabt0Stbysbi_SPEC,
1118        crate::common::RW,
1119    > {
1120        crate::common::RegisterField::<
1121            0,
1122            0x1,
1123            1,
1124            0,
1125            bussabt0stbysbi::Arbs,
1126            bussabt0stbysbi::Arbs,
1127            Bussabt0Stbysbi_SPEC,
1128            crate::common::RW,
1129        >::from_register(self, 0)
1130    }
1131}
1132impl ::core::default::Default for Bussabt0Stbysbi {
1133    #[inline(always)]
1134    fn default() -> Bussabt0Stbysbi {
1135        <crate::RegValueT<Bussabt0Stbysbi_SPEC> as RegisterValue<_>>::new(0)
1136    }
1137}
1138pub mod bussabt0stbysbi {
1139
1140    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1141    pub struct Arbs_SPEC;
1142    pub type Arbs = crate::EnumBitfieldStruct<u8, Arbs_SPEC>;
1143    impl Arbs {
1144        #[doc = "Fixed priority"]
1145        pub const _0: Self = Self::new(0);
1146
1147        #[doc = "Round-robin"]
1148        pub const _1: Self = Self::new(1);
1149    }
1150}
1151#[doc(hidden)]
1152#[derive(Copy, Clone, Eq, PartialEq)]
1153pub struct Bussabt0Eobi_SPEC;
1154impl crate::sealed::RegSpec for Bussabt0Eobi_SPEC {
1155    type DataType = u32;
1156}
1157
1158#[doc = "Bus Slave Arbitration Control Register 0"]
1159pub type Bussabt0Eobi = crate::RegValueT<Bussabt0Eobi_SPEC>;
1160
1161impl Bussabt0Eobi {
1162    #[doc = "Arbitration Select for <slave>"]
1163    #[inline(always)]
1164    pub fn arbs(
1165        self,
1166    ) -> crate::common::RegisterField<
1167        0,
1168        0x1,
1169        1,
1170        0,
1171        bussabt0eobi::Arbs,
1172        bussabt0eobi::Arbs,
1173        Bussabt0Eobi_SPEC,
1174        crate::common::RW,
1175    > {
1176        crate::common::RegisterField::<
1177            0,
1178            0x1,
1179            1,
1180            0,
1181            bussabt0eobi::Arbs,
1182            bussabt0eobi::Arbs,
1183            Bussabt0Eobi_SPEC,
1184            crate::common::RW,
1185        >::from_register(self, 0)
1186    }
1187}
1188impl ::core::default::Default for Bussabt0Eobi {
1189    #[inline(always)]
1190    fn default() -> Bussabt0Eobi {
1191        <crate::RegValueT<Bussabt0Eobi_SPEC> as RegisterValue<_>>::new(0)
1192    }
1193}
1194pub mod bussabt0eobi {
1195
1196    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1197    pub struct Arbs_SPEC;
1198    pub type Arbs = crate::EnumBitfieldStruct<u8, Arbs_SPEC>;
1199    impl Arbs {
1200        #[doc = "Fixed priority"]
1201        pub const _0: Self = Self::new(0);
1202
1203        #[doc = "Round-robin"]
1204        pub const _1: Self = Self::new(1);
1205    }
1206}
1207#[doc(hidden)]
1208#[derive(Copy, Clone, Eq, PartialEq)]
1209pub struct Bussabt0Pbbi_SPEC;
1210impl crate::sealed::RegSpec for Bussabt0Pbbi_SPEC {
1211    type DataType = u32;
1212}
1213
1214#[doc = "Bus Slave Arbitration Control Register 0"]
1215pub type Bussabt0Pbbi = crate::RegValueT<Bussabt0Pbbi_SPEC>;
1216
1217impl Bussabt0Pbbi {
1218    #[doc = "Arbitration Select for <slave>"]
1219    #[inline(always)]
1220    pub fn arbs(
1221        self,
1222    ) -> crate::common::RegisterField<
1223        0,
1224        0x1,
1225        1,
1226        0,
1227        bussabt0pbbi::Arbs,
1228        bussabt0pbbi::Arbs,
1229        Bussabt0Pbbi_SPEC,
1230        crate::common::RW,
1231    > {
1232        crate::common::RegisterField::<
1233            0,
1234            0x1,
1235            1,
1236            0,
1237            bussabt0pbbi::Arbs,
1238            bussabt0pbbi::Arbs,
1239            Bussabt0Pbbi_SPEC,
1240            crate::common::RW,
1241        >::from_register(self, 0)
1242    }
1243}
1244impl ::core::default::Default for Bussabt0Pbbi {
1245    #[inline(always)]
1246    fn default() -> Bussabt0Pbbi {
1247        <crate::RegValueT<Bussabt0Pbbi_SPEC> as RegisterValue<_>>::new(0)
1248    }
1249}
1250pub mod bussabt0pbbi {
1251
1252    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1253    pub struct Arbs_SPEC;
1254    pub type Arbs = crate::EnumBitfieldStruct<u8, Arbs_SPEC>;
1255    impl Arbs {
1256        #[doc = "Fixed priority"]
1257        pub const _0: Self = Self::new(0);
1258
1259        #[doc = "Round-robin"]
1260        pub const _1: Self = Self::new(1);
1261    }
1262}
1263#[doc(hidden)]
1264#[derive(Copy, Clone, Eq, PartialEq)]
1265pub struct Bussabt0Pabi_SPEC;
1266impl crate::sealed::RegSpec for Bussabt0Pabi_SPEC {
1267    type DataType = u32;
1268}
1269
1270#[doc = "Bus Slave Arbitration Control Register 0"]
1271pub type Bussabt0Pabi = crate::RegValueT<Bussabt0Pabi_SPEC>;
1272
1273impl Bussabt0Pabi {
1274    #[doc = "Arbitration Select for <slave>"]
1275    #[inline(always)]
1276    pub fn arbs(
1277        self,
1278    ) -> crate::common::RegisterField<
1279        0,
1280        0x1,
1281        1,
1282        0,
1283        bussabt0pabi::Arbs,
1284        bussabt0pabi::Arbs,
1285        Bussabt0Pabi_SPEC,
1286        crate::common::RW,
1287    > {
1288        crate::common::RegisterField::<
1289            0,
1290            0x1,
1291            1,
1292            0,
1293            bussabt0pabi::Arbs,
1294            bussabt0pabi::Arbs,
1295            Bussabt0Pabi_SPEC,
1296            crate::common::RW,
1297        >::from_register(self, 0)
1298    }
1299}
1300impl ::core::default::Default for Bussabt0Pabi {
1301    #[inline(always)]
1302    fn default() -> Bussabt0Pabi {
1303        <crate::RegValueT<Bussabt0Pabi_SPEC> as RegisterValue<_>>::new(0)
1304    }
1305}
1306pub mod bussabt0pabi {
1307
1308    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1309    pub struct Arbs_SPEC;
1310    pub type Arbs = crate::EnumBitfieldStruct<u8, Arbs_SPEC>;
1311    impl Arbs {
1312        #[doc = "Fixed priority"]
1313        pub const _0: Self = Self::new(0);
1314
1315        #[doc = "Round-robin"]
1316        pub const _1: Self = Self::new(1);
1317    }
1318}
1319#[doc(hidden)]
1320#[derive(Copy, Clone, Eq, PartialEq)]
1321pub struct Bussabt0Pibi_SPEC;
1322impl crate::sealed::RegSpec for Bussabt0Pibi_SPEC {
1323    type DataType = u32;
1324}
1325
1326#[doc = "Bus Slave Arbitration Control Register 0"]
1327pub type Bussabt0Pibi = crate::RegValueT<Bussabt0Pibi_SPEC>;
1328
1329impl Bussabt0Pibi {
1330    #[doc = "Arbitration Select for <slave>"]
1331    #[inline(always)]
1332    pub fn arbs(
1333        self,
1334    ) -> crate::common::RegisterField<
1335        0,
1336        0x1,
1337        1,
1338        0,
1339        bussabt0pibi::Arbs,
1340        bussabt0pibi::Arbs,
1341        Bussabt0Pibi_SPEC,
1342        crate::common::RW,
1343    > {
1344        crate::common::RegisterField::<
1345            0,
1346            0x1,
1347            1,
1348            0,
1349            bussabt0pibi::Arbs,
1350            bussabt0pibi::Arbs,
1351            Bussabt0Pibi_SPEC,
1352            crate::common::RW,
1353        >::from_register(self, 0)
1354    }
1355}
1356impl ::core::default::Default for Bussabt0Pibi {
1357    #[inline(always)]
1358    fn default() -> Bussabt0Pibi {
1359        <crate::RegValueT<Bussabt0Pibi_SPEC> as RegisterValue<_>>::new(0)
1360    }
1361}
1362pub mod bussabt0pibi {
1363
1364    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1365    pub struct Arbs_SPEC;
1366    pub type Arbs = crate::EnumBitfieldStruct<u8, Arbs_SPEC>;
1367    impl Arbs {
1368        #[doc = "Fixed priority"]
1369        pub const _0: Self = Self::new(0);
1370
1371        #[doc = "Round-robin"]
1372        pub const _1: Self = Self::new(1);
1373    }
1374}
1375#[doc(hidden)]
1376#[derive(Copy, Clone, Eq, PartialEq)]
1377pub struct Bussabt0Psbi_SPEC;
1378impl crate::sealed::RegSpec for Bussabt0Psbi_SPEC {
1379    type DataType = u32;
1380}
1381
1382#[doc = "Bus Slave Arbitration Control Register 0"]
1383pub type Bussabt0Psbi = crate::RegValueT<Bussabt0Psbi_SPEC>;
1384
1385impl Bussabt0Psbi {
1386    #[doc = "Arbitration Select for <slave>"]
1387    #[inline(always)]
1388    pub fn arbs(
1389        self,
1390    ) -> crate::common::RegisterField<
1391        0,
1392        0x1,
1393        1,
1394        0,
1395        bussabt0psbi::Arbs,
1396        bussabt0psbi::Arbs,
1397        Bussabt0Psbi_SPEC,
1398        crate::common::RW,
1399    > {
1400        crate::common::RegisterField::<
1401            0,
1402            0x1,
1403            1,
1404            0,
1405            bussabt0psbi::Arbs,
1406            bussabt0psbi::Arbs,
1407            Bussabt0Psbi_SPEC,
1408            crate::common::RW,
1409        >::from_register(self, 0)
1410    }
1411}
1412impl ::core::default::Default for Bussabt0Psbi {
1413    #[inline(always)]
1414    fn default() -> Bussabt0Psbi {
1415        <crate::RegValueT<Bussabt0Psbi_SPEC> as RegisterValue<_>>::new(0)
1416    }
1417}
1418pub mod bussabt0psbi {
1419
1420    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1421    pub struct Arbs_SPEC;
1422    pub type Arbs = crate::EnumBitfieldStruct<u8, Arbs_SPEC>;
1423    impl Arbs {
1424        #[doc = "Fixed priority"]
1425        pub const _0: Self = Self::new(0);
1426
1427        #[doc = "Round-robin"]
1428        pub const _1: Self = Self::new(1);
1429    }
1430}
1431#[doc(hidden)]
1432#[derive(Copy, Clone, Eq, PartialEq)]
1433pub struct Busdivbyp_SPEC;
1434impl crate::sealed::RegSpec for Busdivbyp_SPEC {
1435    type DataType = u32;
1436}
1437
1438#[doc = "Bus Divider Bypass Register"]
1439pub type Busdivbyp = crate::RegValueT<Busdivbyp_SPEC>;
1440
1441impl Busdivbyp {
1442    #[doc = "Divider for EDMACBI bypass enable"]
1443    #[inline(always)]
1444    pub fn edmabpe(
1445        self,
1446    ) -> crate::common::RegisterField<
1447        0,
1448        0x1,
1449        1,
1450        0,
1451        busdivbyp::Edmabpe,
1452        busdivbyp::Edmabpe,
1453        Busdivbyp_SPEC,
1454        crate::common::RW,
1455    > {
1456        crate::common::RegisterField::<
1457            0,
1458            0x1,
1459            1,
1460            0,
1461            busdivbyp::Edmabpe,
1462            busdivbyp::Edmabpe,
1463            Busdivbyp_SPEC,
1464            crate::common::RW,
1465        >::from_register(self, 0)
1466    }
1467
1468    #[doc = "Divider for CPUSAHBI bypass enable"]
1469    #[inline(always)]
1470    pub fn cpu0sbpe(
1471        self,
1472    ) -> crate::common::RegisterField<
1473        16,
1474        0x1,
1475        1,
1476        0,
1477        busdivbyp::Cpu0Sbpe,
1478        busdivbyp::Cpu0Sbpe,
1479        Busdivbyp_SPEC,
1480        crate::common::RW,
1481    > {
1482        crate::common::RegisterField::<
1483            16,
1484            0x1,
1485            1,
1486            0,
1487            busdivbyp::Cpu0Sbpe,
1488            busdivbyp::Cpu0Sbpe,
1489            Busdivbyp_SPEC,
1490            crate::common::RW,
1491        >::from_register(self, 0)
1492    }
1493}
1494impl ::core::default::Default for Busdivbyp {
1495    #[inline(always)]
1496    fn default() -> Busdivbyp {
1497        <crate::RegValueT<Busdivbyp_SPEC> as RegisterValue<_>>::new(0)
1498    }
1499}
1500pub mod busdivbyp {
1501
1502    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1503    pub struct Edmabpe_SPEC;
1504    pub type Edmabpe = crate::EnumBitfieldStruct<u8, Edmabpe_SPEC>;
1505    impl Edmabpe {
1506        #[doc = "Disable"]
1507        pub const _0: Self = Self::new(0);
1508
1509        #[doc = "Enable"]
1510        pub const _1: Self = Self::new(1);
1511    }
1512    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1513    pub struct Cpu0Sbpe_SPEC;
1514    pub type Cpu0Sbpe = crate::EnumBitfieldStruct<u8, Cpu0Sbpe_SPEC>;
1515    impl Cpu0Sbpe {
1516        #[doc = "Disable"]
1517        pub const _0: Self = Self::new(0);
1518
1519        #[doc = "Enable"]
1520        pub const _1: Self = Self::new(1);
1521    }
1522}
1523#[doc(hidden)]
1524#[derive(Copy, Clone, Eq, PartialEq)]
1525pub struct Buserrrw_SPEC;
1526impl crate::sealed::RegSpec for Buserrrw_SPEC {
1527    type DataType = u8;
1528}
1529
1530#[doc = "BUS Error Read Write (n = 4, 5)"]
1531pub type Buserrrw = crate::RegValueT<Buserrrw_SPEC>;
1532
1533impl Buserrrw {
1534    #[doc = "Error access Read/Write Status"]
1535    #[inline(always)]
1536    pub fn rwstat(
1537        self,
1538    ) -> crate::common::RegisterField<
1539        0,
1540        0x1,
1541        1,
1542        0,
1543        buserrrw::Rwstat,
1544        buserrrw::Rwstat,
1545        Buserrrw_SPEC,
1546        crate::common::R,
1547    > {
1548        crate::common::RegisterField::<
1549            0,
1550            0x1,
1551            1,
1552            0,
1553            buserrrw::Rwstat,
1554            buserrrw::Rwstat,
1555            Buserrrw_SPEC,
1556            crate::common::R,
1557        >::from_register(self, 0)
1558    }
1559}
1560impl ::core::default::Default for Buserrrw {
1561    #[inline(always)]
1562    fn default() -> Buserrrw {
1563        <crate::RegValueT<Buserrrw_SPEC> as RegisterValue<_>>::new(0)
1564    }
1565}
1566pub mod buserrrw {
1567
1568    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1569    pub struct Rwstat_SPEC;
1570    pub type Rwstat = crate::EnumBitfieldStruct<u8, Rwstat_SPEC>;
1571    impl Rwstat {
1572        #[doc = "Read access"]
1573        pub const _0: Self = Self::new(0);
1574
1575        #[doc = "Write access"]
1576        pub const _1: Self = Self::new(1);
1577    }
1578}
1579#[doc(hidden)]
1580#[derive(Copy, Clone, Eq, PartialEq)]
1581pub struct Buserradd_SPEC;
1582impl crate::sealed::RegSpec for Buserradd_SPEC {
1583    type DataType = u32;
1584}
1585
1586#[doc = "BUS Error Address Register (n = 4, 5)"]
1587pub type Buserradd = crate::RegValueT<Buserradd_SPEC>;
1588
1589impl Buserradd {
1590    #[doc = "Bus Error Address"]
1591    #[inline(always)]
1592    pub fn berad(
1593        self,
1594    ) -> crate::common::RegisterField<0, 0xffffffff, 1, 0, u32, u32, Buserradd_SPEC, crate::common::R>
1595    {
1596        crate::common::RegisterField::<
1597            0,
1598            0xffffffff,
1599            1,
1600            0,
1601            u32,
1602            u32,
1603            Buserradd_SPEC,
1604            crate::common::R,
1605        >::from_register(self, 0)
1606    }
1607}
1608impl ::core::default::Default for Buserradd {
1609    #[inline(always)]
1610    fn default() -> Buserradd {
1611        <crate::RegValueT<Buserradd_SPEC> as RegisterValue<_>>::new(0)
1612    }
1613}
1614
1615#[doc(hidden)]
1616#[derive(Copy, Clone, Eq, PartialEq)]
1617pub struct Bmsaerradd_SPEC;
1618impl crate::sealed::RegSpec for Bmsaerradd_SPEC {
1619    type DataType = u32;
1620}
1621
1622#[doc = "Bus Master Security Attribution Unit Error Address"]
1623pub type Bmsaerradd = crate::RegValueT<Bmsaerradd_SPEC>;
1624
1625impl Bmsaerradd {
1626    #[doc = "Bus Master Security Attribution Unit Error Address"]
1627    #[inline(always)]
1628    pub fn mserad(
1629        self,
1630    ) -> crate::common::RegisterField<
1631        0,
1632        0xffffffff,
1633        1,
1634        0,
1635        u32,
1636        u32,
1637        Bmsaerradd_SPEC,
1638        crate::common::R,
1639    > {
1640        crate::common::RegisterField::<
1641            0,
1642            0xffffffff,
1643            1,
1644            0,
1645            u32,
1646            u32,
1647            Bmsaerradd_SPEC,
1648            crate::common::R,
1649        >::from_register(self, 0)
1650    }
1651}
1652impl ::core::default::Default for Bmsaerradd {
1653    #[inline(always)]
1654    fn default() -> Bmsaerradd {
1655        <crate::RegValueT<Bmsaerradd_SPEC> as RegisterValue<_>>::new(0)
1656    }
1657}
1658
1659#[doc(hidden)]
1660#[derive(Copy, Clone, Eq, PartialEq)]
1661pub struct Bmsaerrrw_SPEC;
1662impl crate::sealed::RegSpec for Bmsaerrrw_SPEC {
1663    type DataType = u8;
1664}
1665
1666#[doc = "BUS Master Security Attribution Unit Error Read Write (n = 4, 5)"]
1667pub type Bmsaerrrw = crate::RegValueT<Bmsaerrrw_SPEC>;
1668
1669impl Bmsaerrrw {
1670    #[doc = "Master Security Attribution Unit error access Read/Write Status"]
1671    #[inline(always)]
1672    pub fn msarwstat(
1673        self,
1674    ) -> crate::common::RegisterField<
1675        0,
1676        0x1,
1677        1,
1678        0,
1679        bmsaerrrw::Msarwstat,
1680        bmsaerrrw::Msarwstat,
1681        Bmsaerrrw_SPEC,
1682        crate::common::R,
1683    > {
1684        crate::common::RegisterField::<
1685            0,
1686            0x1,
1687            1,
1688            0,
1689            bmsaerrrw::Msarwstat,
1690            bmsaerrrw::Msarwstat,
1691            Bmsaerrrw_SPEC,
1692            crate::common::R,
1693        >::from_register(self, 0)
1694    }
1695}
1696impl ::core::default::Default for Bmsaerrrw {
1697    #[inline(always)]
1698    fn default() -> Bmsaerrrw {
1699        <crate::RegValueT<Bmsaerrrw_SPEC> as RegisterValue<_>>::new(0)
1700    }
1701}
1702pub mod bmsaerrrw {
1703
1704    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1705    pub struct Msarwstat_SPEC;
1706    pub type Msarwstat = crate::EnumBitfieldStruct<u8, Msarwstat_SPEC>;
1707    impl Msarwstat {
1708        #[doc = "Read access"]
1709        pub const _0: Self = Self::new(0);
1710
1711        #[doc = "Write access"]
1712        pub const _1: Self = Self::new(1);
1713    }
1714}
1715#[doc(hidden)]
1716#[derive(Copy, Clone, Eq, PartialEq)]
1717pub struct Buserrstat_SPEC;
1718impl crate::sealed::RegSpec for Buserrstat_SPEC {
1719    type DataType = u8;
1720}
1721
1722#[doc = "BUS Error Status Register"]
1723pub type Buserrstat = crate::RegValueT<Buserrstat_SPEC>;
1724
1725impl Buserrstat {
1726    #[doc = "Slave Bus Error Status"]
1727    #[inline(always)]
1728    pub fn slerrstat(
1729        self,
1730    ) -> crate::common::RegisterField<
1731        0,
1732        0x1,
1733        1,
1734        0,
1735        buserrstat::Slerrstat,
1736        buserrstat::Slerrstat,
1737        Buserrstat_SPEC,
1738        crate::common::R,
1739    > {
1740        crate::common::RegisterField::<
1741            0,
1742            0x1,
1743            1,
1744            0,
1745            buserrstat::Slerrstat,
1746            buserrstat::Slerrstat,
1747            Buserrstat_SPEC,
1748            crate::common::R,
1749        >::from_register(self, 0)
1750    }
1751
1752    #[doc = "Master MPU Error Status"]
1753    #[inline(always)]
1754    pub fn mmerrstat(
1755        self,
1756    ) -> crate::common::RegisterField<
1757        3,
1758        0x1,
1759        1,
1760        0,
1761        buserrstat::Mmerrstat,
1762        buserrstat::Mmerrstat,
1763        Buserrstat_SPEC,
1764        crate::common::R,
1765    > {
1766        crate::common::RegisterField::<
1767            3,
1768            0x1,
1769            1,
1770            0,
1771            buserrstat::Mmerrstat,
1772            buserrstat::Mmerrstat,
1773            Buserrstat_SPEC,
1774            crate::common::R,
1775        >::from_register(self, 0)
1776    }
1777
1778    #[doc = "Illegal Address Access Error Status"]
1779    #[inline(always)]
1780    pub fn ilerrstat(
1781        self,
1782    ) -> crate::common::RegisterField<
1783        4,
1784        0x1,
1785        1,
1786        0,
1787        buserrstat::Ilerrstat,
1788        buserrstat::Ilerrstat,
1789        Buserrstat_SPEC,
1790        crate::common::R,
1791    > {
1792        crate::common::RegisterField::<
1793            4,
1794            0x1,
1795            1,
1796            0,
1797            buserrstat::Ilerrstat,
1798            buserrstat::Ilerrstat,
1799            Buserrstat_SPEC,
1800            crate::common::R,
1801        >::from_register(self, 0)
1802    }
1803
1804    #[doc = "Master Security Attribution Unit Error Status"]
1805    #[inline(always)]
1806    pub fn mserrstat(
1807        self,
1808    ) -> crate::common::RegisterField<
1809        5,
1810        0x1,
1811        1,
1812        0,
1813        buserrstat::Mserrstat,
1814        buserrstat::Mserrstat,
1815        Buserrstat_SPEC,
1816        crate::common::R,
1817    > {
1818        crate::common::RegisterField::<
1819            5,
1820            0x1,
1821            1,
1822            0,
1823            buserrstat::Mserrstat,
1824            buserrstat::Mserrstat,
1825            Buserrstat_SPEC,
1826            crate::common::R,
1827        >::from_register(self, 0)
1828    }
1829}
1830impl ::core::default::Default for Buserrstat {
1831    #[inline(always)]
1832    fn default() -> Buserrstat {
1833        <crate::RegValueT<Buserrstat_SPEC> as RegisterValue<_>>::new(0)
1834    }
1835}
1836pub mod buserrstat {
1837
1838    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1839    pub struct Slerrstat_SPEC;
1840    pub type Slerrstat = crate::EnumBitfieldStruct<u8, Slerrstat_SPEC>;
1841    impl Slerrstat {
1842        #[doc = "No error occurred"]
1843        pub const _0: Self = Self::new(0);
1844
1845        #[doc = "Error occurred"]
1846        pub const _1: Self = Self::new(1);
1847    }
1848    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1849    pub struct Mmerrstat_SPEC;
1850    pub type Mmerrstat = crate::EnumBitfieldStruct<u8, Mmerrstat_SPEC>;
1851    impl Mmerrstat {
1852        #[doc = "No error occurred"]
1853        pub const _0: Self = Self::new(0);
1854
1855        #[doc = "Error occurred"]
1856        pub const _1: Self = Self::new(1);
1857    }
1858    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1859    pub struct Ilerrstat_SPEC;
1860    pub type Ilerrstat = crate::EnumBitfieldStruct<u8, Ilerrstat_SPEC>;
1861    impl Ilerrstat {
1862        #[doc = "No error occurred"]
1863        pub const _0: Self = Self::new(0);
1864
1865        #[doc = "Error occurred"]
1866        pub const _1: Self = Self::new(1);
1867    }
1868    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1869    pub struct Mserrstat_SPEC;
1870    pub type Mserrstat = crate::EnumBitfieldStruct<u8, Mserrstat_SPEC>;
1871    impl Mserrstat {
1872        #[doc = "No error occurred"]
1873        pub const _0: Self = Self::new(0);
1874
1875        #[doc = "Error occurred"]
1876        pub const _1: Self = Self::new(1);
1877    }
1878}
1879#[doc(hidden)]
1880#[derive(Copy, Clone, Eq, PartialEq)]
1881pub struct Buserrclr_SPEC;
1882impl crate::sealed::RegSpec for Buserrclr_SPEC {
1883    type DataType = u8;
1884}
1885
1886#[doc = "BUS Error Clear Register"]
1887pub type Buserrclr = crate::RegValueT<Buserrclr_SPEC>;
1888
1889impl Buserrclr {
1890    #[doc = "Slave Bus Error Clear"]
1891    #[inline(always)]
1892    pub fn slerrclr(
1893        self,
1894    ) -> crate::common::RegisterFieldBool<0, 1, 0, Buserrclr_SPEC, crate::common::RW> {
1895        crate::common::RegisterFieldBool::<0,1,0,Buserrclr_SPEC,crate::common::RW>::from_register(self,0)
1896    }
1897
1898    #[doc = "Master MPU Error Clear"]
1899    #[inline(always)]
1900    pub fn mmerrclr(
1901        self,
1902    ) -> crate::common::RegisterFieldBool<3, 1, 0, Buserrclr_SPEC, crate::common::RW> {
1903        crate::common::RegisterFieldBool::<3,1,0,Buserrclr_SPEC,crate::common::RW>::from_register(self,0)
1904    }
1905
1906    #[doc = "Illegal Address Access Error Clear"]
1907    #[inline(always)]
1908    pub fn ilerrclr(
1909        self,
1910    ) -> crate::common::RegisterFieldBool<4, 1, 0, Buserrclr_SPEC, crate::common::RW> {
1911        crate::common::RegisterFieldBool::<4,1,0,Buserrclr_SPEC,crate::common::RW>::from_register(self,0)
1912    }
1913
1914    #[doc = "Master Security Attribution Unit Error Clear"]
1915    #[inline(always)]
1916    pub fn mserrclr(
1917        self,
1918    ) -> crate::common::RegisterFieldBool<5, 1, 0, Buserrclr_SPEC, crate::common::RW> {
1919        crate::common::RegisterFieldBool::<5,1,0,Buserrclr_SPEC,crate::common::RW>::from_register(self,0)
1920    }
1921}
1922impl ::core::default::Default for Buserrclr {
1923    #[inline(always)]
1924    fn default() -> Buserrclr {
1925        <crate::RegValueT<Buserrclr_SPEC> as RegisterValue<_>>::new(0)
1926    }
1927}
1928
1929#[doc(hidden)]
1930#[derive(Copy, Clone, Eq, PartialEq)]
1931pub struct Mbwerrstat_SPEC;
1932impl crate::sealed::RegSpec for Mbwerrstat_SPEC {
1933    type DataType = u32;
1934}
1935
1936#[doc = "Master Bufferable Write Error Status Register"]
1937pub type Mbwerrstat = crate::RegValueT<Mbwerrstat_SPEC>;
1938
1939impl Mbwerrstat {
1940    #[doc = "Master Bufferable Write Error"]
1941    #[inline(always)]
1942    pub fn mbwerr0(
1943        self,
1944    ) -> crate::common::RegisterField<
1945        0,
1946        0x1,
1947        1,
1948        0,
1949        mbwerrstat::Mbwerr0,
1950        mbwerrstat::Mbwerr0,
1951        Mbwerrstat_SPEC,
1952        crate::common::R,
1953    > {
1954        crate::common::RegisterField::<
1955            0,
1956            0x1,
1957            1,
1958            0,
1959            mbwerrstat::Mbwerr0,
1960            mbwerrstat::Mbwerr0,
1961            Mbwerrstat_SPEC,
1962            crate::common::R,
1963        >::from_register(self, 0)
1964    }
1965
1966    #[doc = "Master Bufferable Write Error"]
1967    #[inline(always)]
1968    pub fn mbwerr1(
1969        self,
1970    ) -> crate::common::RegisterField<
1971        1,
1972        0x1,
1973        1,
1974        0,
1975        mbwerrstat::Mbwerr1,
1976        mbwerrstat::Mbwerr1,
1977        Mbwerrstat_SPEC,
1978        crate::common::R,
1979    > {
1980        crate::common::RegisterField::<
1981            1,
1982            0x1,
1983            1,
1984            0,
1985            mbwerrstat::Mbwerr1,
1986            mbwerrstat::Mbwerr1,
1987            Mbwerrstat_SPEC,
1988            crate::common::R,
1989        >::from_register(self, 0)
1990    }
1991
1992    #[doc = "Master Bufferable Write Error"]
1993    #[inline(always)]
1994    pub fn mbwerr8(
1995        self,
1996    ) -> crate::common::RegisterField<
1997        8,
1998        0x1,
1999        1,
2000        0,
2001        mbwerrstat::Mbwerr8,
2002        mbwerrstat::Mbwerr8,
2003        Mbwerrstat_SPEC,
2004        crate::common::R,
2005    > {
2006        crate::common::RegisterField::<
2007            8,
2008            0x1,
2009            1,
2010            0,
2011            mbwerrstat::Mbwerr8,
2012            mbwerrstat::Mbwerr8,
2013            Mbwerrstat_SPEC,
2014            crate::common::R,
2015        >::from_register(self, 0)
2016    }
2017
2018    #[doc = "Master Bufferable Write Error"]
2019    #[inline(always)]
2020    pub fn mbwerr16(
2021        self,
2022    ) -> crate::common::RegisterField<
2023        16,
2024        0x1,
2025        1,
2026        0,
2027        mbwerrstat::Mbwerr16,
2028        mbwerrstat::Mbwerr16,
2029        Mbwerrstat_SPEC,
2030        crate::common::R,
2031    > {
2032        crate::common::RegisterField::<
2033            16,
2034            0x1,
2035            1,
2036            0,
2037            mbwerrstat::Mbwerr16,
2038            mbwerrstat::Mbwerr16,
2039            Mbwerrstat_SPEC,
2040            crate::common::R,
2041        >::from_register(self, 0)
2042    }
2043
2044    #[doc = "Master Bufferable Write Error"]
2045    #[inline(always)]
2046    pub fn mbwerr21(
2047        self,
2048    ) -> crate::common::RegisterField<
2049        21,
2050        0x1,
2051        1,
2052        0,
2053        mbwerrstat::Mbwerr21,
2054        mbwerrstat::Mbwerr21,
2055        Mbwerrstat_SPEC,
2056        crate::common::R,
2057    > {
2058        crate::common::RegisterField::<
2059            21,
2060            0x1,
2061            1,
2062            0,
2063            mbwerrstat::Mbwerr21,
2064            mbwerrstat::Mbwerr21,
2065            Mbwerrstat_SPEC,
2066            crate::common::R,
2067        >::from_register(self, 0)
2068    }
2069}
2070impl ::core::default::Default for Mbwerrstat {
2071    #[inline(always)]
2072    fn default() -> Mbwerrstat {
2073        <crate::RegValueT<Mbwerrstat_SPEC> as RegisterValue<_>>::new(0)
2074    }
2075}
2076pub mod mbwerrstat {
2077
2078    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2079    pub struct Mbwerr0_SPEC;
2080    pub type Mbwerr0 = crate::EnumBitfieldStruct<u8, Mbwerr0_SPEC>;
2081    impl Mbwerr0 {
2082        #[doc = "No bufferable write error in Master #0"]
2083        pub const _0: Self = Self::new(0);
2084
2085        #[doc = "Bufferable write error occurs in Master #0"]
2086        pub const _1: Self = Self::new(1);
2087    }
2088    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2089    pub struct Mbwerr1_SPEC;
2090    pub type Mbwerr1 = crate::EnumBitfieldStruct<u8, Mbwerr1_SPEC>;
2091    impl Mbwerr1 {
2092        #[doc = "No bufferable write error in Master #1"]
2093        pub const _0: Self = Self::new(0);
2094
2095        #[doc = "Bufferable write error occurs in Master #1"]
2096        pub const _1: Self = Self::new(1);
2097    }
2098    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2099    pub struct Mbwerr8_SPEC;
2100    pub type Mbwerr8 = crate::EnumBitfieldStruct<u8, Mbwerr8_SPEC>;
2101    impl Mbwerr8 {
2102        #[doc = "No bufferable write error in Master #8"]
2103        pub const _0: Self = Self::new(0);
2104
2105        #[doc = "Bufferable write error occurs in Master #8"]
2106        pub const _1: Self = Self::new(1);
2107    }
2108    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2109    pub struct Mbwerr16_SPEC;
2110    pub type Mbwerr16 = crate::EnumBitfieldStruct<u8, Mbwerr16_SPEC>;
2111    impl Mbwerr16 {
2112        #[doc = "No bufferable write error in Master #16"]
2113        pub const _0: Self = Self::new(0);
2114
2115        #[doc = "Bufferable write error occurs in Master #16"]
2116        pub const _1: Self = Self::new(1);
2117    }
2118    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2119    pub struct Mbwerr21_SPEC;
2120    pub type Mbwerr21 = crate::EnumBitfieldStruct<u8, Mbwerr21_SPEC>;
2121    impl Mbwerr21 {
2122        #[doc = "No bufferable write error in Master #21"]
2123        pub const _0: Self = Self::new(0);
2124
2125        #[doc = "Bufferable write error occurs in Master #21"]
2126        pub const _1: Self = Self::new(1);
2127    }
2128}
2129#[doc(hidden)]
2130#[derive(Copy, Clone, Eq, PartialEq)]
2131pub struct Mbwerrclr_SPEC;
2132impl crate::sealed::RegSpec for Mbwerrclr_SPEC {
2133    type DataType = u32;
2134}
2135
2136#[doc = "Master Bufferable Write Error Clear Register"]
2137pub type Mbwerrclr = crate::RegValueT<Mbwerrclr_SPEC>;
2138
2139impl Mbwerrclr {
2140    #[doc = "Master Bufferable Write Error Clear"]
2141    #[inline(always)]
2142    pub fn mbweclr0(
2143        self,
2144    ) -> crate::common::RegisterFieldBool<0, 1, 0, Mbwerrclr_SPEC, crate::common::RW> {
2145        crate::common::RegisterFieldBool::<0,1,0,Mbwerrclr_SPEC,crate::common::RW>::from_register(self,0)
2146    }
2147
2148    #[doc = "Master Bufferable Write Error Clear"]
2149    #[inline(always)]
2150    pub fn mbweclr1(
2151        self,
2152    ) -> crate::common::RegisterFieldBool<1, 1, 0, Mbwerrclr_SPEC, crate::common::RW> {
2153        crate::common::RegisterFieldBool::<1,1,0,Mbwerrclr_SPEC,crate::common::RW>::from_register(self,0)
2154    }
2155
2156    #[doc = "Master Bufferable Write Error Clear"]
2157    #[inline(always)]
2158    pub fn mbweclr8(
2159        self,
2160    ) -> crate::common::RegisterFieldBool<8, 1, 0, Mbwerrclr_SPEC, crate::common::RW> {
2161        crate::common::RegisterFieldBool::<8,1,0,Mbwerrclr_SPEC,crate::common::RW>::from_register(self,0)
2162    }
2163
2164    #[doc = "Master Bufferable Write Error Clear"]
2165    #[inline(always)]
2166    pub fn mbweclr16(
2167        self,
2168    ) -> crate::common::RegisterFieldBool<16, 1, 0, Mbwerrclr_SPEC, crate::common::RW> {
2169        crate::common::RegisterFieldBool::<16,1,0,Mbwerrclr_SPEC,crate::common::RW>::from_register(self,0)
2170    }
2171
2172    #[doc = "Master Bufferable Write Error Clear"]
2173    #[inline(always)]
2174    pub fn mbweclr21(
2175        self,
2176    ) -> crate::common::RegisterFieldBool<21, 1, 0, Mbwerrclr_SPEC, crate::common::RW> {
2177        crate::common::RegisterFieldBool::<21,1,0,Mbwerrclr_SPEC,crate::common::RW>::from_register(self,0)
2178    }
2179}
2180impl ::core::default::Default for Mbwerrclr {
2181    #[inline(always)]
2182    fn default() -> Mbwerrclr {
2183        <crate::RegValueT<Mbwerrclr_SPEC> as RegisterValue<_>>::new(0)
2184    }
2185}
2186
2187#[doc(hidden)]
2188#[derive(Copy, Clone, Eq, PartialEq)]
2189pub struct Sbwerrstat_SPEC;
2190impl crate::sealed::RegSpec for Sbwerrstat_SPEC {
2191    type DataType = u32;
2192}
2193
2194#[doc = "Slave Bufferable Write Error Status Register"]
2195pub type Sbwerrstat = crate::RegValueT<Sbwerrstat_SPEC>;
2196
2197impl Sbwerrstat {
2198    #[doc = "Slave Bufferable Write Error"]
2199    #[inline(always)]
2200    pub fn sbwerr0(
2201        self,
2202    ) -> crate::common::RegisterField<
2203        0,
2204        0x1,
2205        1,
2206        0,
2207        sbwerrstat::Sbwerr0,
2208        sbwerrstat::Sbwerr0,
2209        Sbwerrstat_SPEC,
2210        crate::common::R,
2211    > {
2212        crate::common::RegisterField::<
2213            0,
2214            0x1,
2215            1,
2216            0,
2217            sbwerrstat::Sbwerr0,
2218            sbwerrstat::Sbwerr0,
2219            Sbwerrstat_SPEC,
2220            crate::common::R,
2221        >::from_register(self, 0)
2222    }
2223
2224    #[doc = "Slave Bufferable Write Error"]
2225    #[inline(always)]
2226    pub fn sbwerr1(
2227        self,
2228    ) -> crate::common::RegisterField<
2229        1,
2230        0x1,
2231        1,
2232        0,
2233        sbwerrstat::Sbwerr1,
2234        sbwerrstat::Sbwerr1,
2235        Sbwerrstat_SPEC,
2236        crate::common::R,
2237    > {
2238        crate::common::RegisterField::<
2239            1,
2240            0x1,
2241            1,
2242            0,
2243            sbwerrstat::Sbwerr1,
2244            sbwerrstat::Sbwerr1,
2245            Sbwerrstat_SPEC,
2246            crate::common::R,
2247        >::from_register(self, 0)
2248    }
2249
2250    #[doc = "Slave Bufferable Write Error"]
2251    #[inline(always)]
2252    pub fn sbwerr2(
2253        self,
2254    ) -> crate::common::RegisterField<
2255        2,
2256        0x1,
2257        1,
2258        0,
2259        sbwerrstat::Sbwerr2,
2260        sbwerrstat::Sbwerr2,
2261        Sbwerrstat_SPEC,
2262        crate::common::R,
2263    > {
2264        crate::common::RegisterField::<
2265            2,
2266            0x1,
2267            1,
2268            0,
2269            sbwerrstat::Sbwerr2,
2270            sbwerrstat::Sbwerr2,
2271            Sbwerrstat_SPEC,
2272            crate::common::R,
2273        >::from_register(self, 0)
2274    }
2275
2276    #[doc = "Slave Bufferable Write Error"]
2277    #[inline(always)]
2278    pub fn sbwerr4(
2279        self,
2280    ) -> crate::common::RegisterField<
2281        4,
2282        0x1,
2283        1,
2284        0,
2285        sbwerrstat::Sbwerr4,
2286        sbwerrstat::Sbwerr4,
2287        Sbwerrstat_SPEC,
2288        crate::common::R,
2289    > {
2290        crate::common::RegisterField::<
2291            4,
2292            0x1,
2293            1,
2294            0,
2295            sbwerrstat::Sbwerr4,
2296            sbwerrstat::Sbwerr4,
2297            Sbwerrstat_SPEC,
2298            crate::common::R,
2299        >::from_register(self, 0)
2300    }
2301
2302    #[doc = "Slave Bufferable Write Error"]
2303    #[inline(always)]
2304    pub fn sbwerr5(
2305        self,
2306    ) -> crate::common::RegisterField<
2307        5,
2308        0x1,
2309        1,
2310        0,
2311        sbwerrstat::Sbwerr5,
2312        sbwerrstat::Sbwerr5,
2313        Sbwerrstat_SPEC,
2314        crate::common::R,
2315    > {
2316        crate::common::RegisterField::<
2317            5,
2318            0x1,
2319            1,
2320            0,
2321            sbwerrstat::Sbwerr5,
2322            sbwerrstat::Sbwerr5,
2323            Sbwerrstat_SPEC,
2324            crate::common::R,
2325        >::from_register(self, 0)
2326    }
2327
2328    #[doc = "Slave Bufferable Write Error"]
2329    #[inline(always)]
2330    pub fn sbwerr7(
2331        self,
2332    ) -> crate::common::RegisterField<
2333        7,
2334        0x1,
2335        1,
2336        0,
2337        sbwerrstat::Sbwerr7,
2338        sbwerrstat::Sbwerr7,
2339        Sbwerrstat_SPEC,
2340        crate::common::R,
2341    > {
2342        crate::common::RegisterField::<
2343            7,
2344            0x1,
2345            1,
2346            0,
2347            sbwerrstat::Sbwerr7,
2348            sbwerrstat::Sbwerr7,
2349            Sbwerrstat_SPEC,
2350            crate::common::R,
2351        >::from_register(self, 0)
2352    }
2353
2354    #[doc = "Slave Bufferable Write Error"]
2355    #[inline(always)]
2356    pub fn sbwerr8(
2357        self,
2358    ) -> crate::common::RegisterField<
2359        8,
2360        0x1,
2361        1,
2362        0,
2363        sbwerrstat::Sbwerr8,
2364        sbwerrstat::Sbwerr8,
2365        Sbwerrstat_SPEC,
2366        crate::common::R,
2367    > {
2368        crate::common::RegisterField::<
2369            8,
2370            0x1,
2371            1,
2372            0,
2373            sbwerrstat::Sbwerr8,
2374            sbwerrstat::Sbwerr8,
2375            Sbwerrstat_SPEC,
2376            crate::common::R,
2377        >::from_register(self, 0)
2378    }
2379
2380    #[doc = "Slave Bufferable Write Error"]
2381    #[inline(always)]
2382    pub fn sbwerr9(
2383        self,
2384    ) -> crate::common::RegisterField<
2385        9,
2386        0x1,
2387        1,
2388        0,
2389        sbwerrstat::Sbwerr9,
2390        sbwerrstat::Sbwerr9,
2391        Sbwerrstat_SPEC,
2392        crate::common::R,
2393    > {
2394        crate::common::RegisterField::<
2395            9,
2396            0x1,
2397            1,
2398            0,
2399            sbwerrstat::Sbwerr9,
2400            sbwerrstat::Sbwerr9,
2401            Sbwerrstat_SPEC,
2402            crate::common::R,
2403        >::from_register(self, 0)
2404    }
2405
2406    #[doc = "Slave Bufferable Write Error"]
2407    #[inline(always)]
2408    pub fn sbwerr10(
2409        self,
2410    ) -> crate::common::RegisterField<
2411        10,
2412        0x1,
2413        1,
2414        0,
2415        sbwerrstat::Sbwerr10,
2416        sbwerrstat::Sbwerr10,
2417        Sbwerrstat_SPEC,
2418        crate::common::R,
2419    > {
2420        crate::common::RegisterField::<
2421            10,
2422            0x1,
2423            1,
2424            0,
2425            sbwerrstat::Sbwerr10,
2426            sbwerrstat::Sbwerr10,
2427            Sbwerrstat_SPEC,
2428            crate::common::R,
2429        >::from_register(self, 0)
2430    }
2431
2432    #[doc = "Slave Bufferable Write Error"]
2433    #[inline(always)]
2434    pub fn sbwerr11(
2435        self,
2436    ) -> crate::common::RegisterField<
2437        11,
2438        0x1,
2439        1,
2440        0,
2441        sbwerrstat::Sbwerr11,
2442        sbwerrstat::Sbwerr11,
2443        Sbwerrstat_SPEC,
2444        crate::common::R,
2445    > {
2446        crate::common::RegisterField::<
2447            11,
2448            0x1,
2449            1,
2450            0,
2451            sbwerrstat::Sbwerr11,
2452            sbwerrstat::Sbwerr11,
2453            Sbwerrstat_SPEC,
2454            crate::common::R,
2455        >::from_register(self, 0)
2456    }
2457
2458    #[doc = "Slave Bufferable Write Error"]
2459    #[inline(always)]
2460    pub fn sbwerr12(
2461        self,
2462    ) -> crate::common::RegisterField<
2463        12,
2464        0x1,
2465        1,
2466        0,
2467        sbwerrstat::Sbwerr12,
2468        sbwerrstat::Sbwerr12,
2469        Sbwerrstat_SPEC,
2470        crate::common::R,
2471    > {
2472        crate::common::RegisterField::<
2473            12,
2474            0x1,
2475            1,
2476            0,
2477            sbwerrstat::Sbwerr12,
2478            sbwerrstat::Sbwerr12,
2479            Sbwerrstat_SPEC,
2480            crate::common::R,
2481        >::from_register(self, 0)
2482    }
2483}
2484impl ::core::default::Default for Sbwerrstat {
2485    #[inline(always)]
2486    fn default() -> Sbwerrstat {
2487        <crate::RegValueT<Sbwerrstat_SPEC> as RegisterValue<_>>::new(0)
2488    }
2489}
2490pub mod sbwerrstat {
2491
2492    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2493    pub struct Sbwerr0_SPEC;
2494    pub type Sbwerr0 = crate::EnumBitfieldStruct<u8, Sbwerr0_SPEC>;
2495    impl Sbwerr0 {
2496        #[doc = "No bufferable write error in Slave #0"]
2497        pub const _0: Self = Self::new(0);
2498
2499        #[doc = "Bufferable write error occurs in Slave #0"]
2500        pub const _1: Self = Self::new(1);
2501    }
2502    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2503    pub struct Sbwerr1_SPEC;
2504    pub type Sbwerr1 = crate::EnumBitfieldStruct<u8, Sbwerr1_SPEC>;
2505    impl Sbwerr1 {
2506        #[doc = "No bufferable write error in Slave #1"]
2507        pub const _0: Self = Self::new(0);
2508
2509        #[doc = "Bufferable write error occurs in Slave #1"]
2510        pub const _1: Self = Self::new(1);
2511    }
2512    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2513    pub struct Sbwerr2_SPEC;
2514    pub type Sbwerr2 = crate::EnumBitfieldStruct<u8, Sbwerr2_SPEC>;
2515    impl Sbwerr2 {
2516        #[doc = "No bufferable write error in Slave #2"]
2517        pub const _0: Self = Self::new(0);
2518
2519        #[doc = "Bufferable write error occurs in Slave #2"]
2520        pub const _1: Self = Self::new(1);
2521    }
2522    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2523    pub struct Sbwerr4_SPEC;
2524    pub type Sbwerr4 = crate::EnumBitfieldStruct<u8, Sbwerr4_SPEC>;
2525    impl Sbwerr4 {
2526        #[doc = "No bufferable write error in Slave #4"]
2527        pub const _0: Self = Self::new(0);
2528
2529        #[doc = "Bufferable write error occurs in Slave #4"]
2530        pub const _1: Self = Self::new(1);
2531    }
2532    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2533    pub struct Sbwerr5_SPEC;
2534    pub type Sbwerr5 = crate::EnumBitfieldStruct<u8, Sbwerr5_SPEC>;
2535    impl Sbwerr5 {
2536        #[doc = "No bufferable write error in Slave #5"]
2537        pub const _0: Self = Self::new(0);
2538
2539        #[doc = "Bufferable write error occurs in Slave #5"]
2540        pub const _1: Self = Self::new(1);
2541    }
2542    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2543    pub struct Sbwerr7_SPEC;
2544    pub type Sbwerr7 = crate::EnumBitfieldStruct<u8, Sbwerr7_SPEC>;
2545    impl Sbwerr7 {
2546        #[doc = "No bufferable write error in Slave #7"]
2547        pub const _0: Self = Self::new(0);
2548
2549        #[doc = "Bufferable write error occurs in Slave #7"]
2550        pub const _1: Self = Self::new(1);
2551    }
2552    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2553    pub struct Sbwerr8_SPEC;
2554    pub type Sbwerr8 = crate::EnumBitfieldStruct<u8, Sbwerr8_SPEC>;
2555    impl Sbwerr8 {
2556        #[doc = "No bufferable write error in Slave #8"]
2557        pub const _0: Self = Self::new(0);
2558
2559        #[doc = "Bufferable write error occurs in Slave #8"]
2560        pub const _1: Self = Self::new(1);
2561    }
2562    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2563    pub struct Sbwerr9_SPEC;
2564    pub type Sbwerr9 = crate::EnumBitfieldStruct<u8, Sbwerr9_SPEC>;
2565    impl Sbwerr9 {
2566        #[doc = "No bufferable write error in Slave #9"]
2567        pub const _0: Self = Self::new(0);
2568
2569        #[doc = "Bufferable write error occurs in Slave #9"]
2570        pub const _1: Self = Self::new(1);
2571    }
2572    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2573    pub struct Sbwerr10_SPEC;
2574    pub type Sbwerr10 = crate::EnumBitfieldStruct<u8, Sbwerr10_SPEC>;
2575    impl Sbwerr10 {
2576        #[doc = "No bufferable write error in Slave #10"]
2577        pub const _0: Self = Self::new(0);
2578
2579        #[doc = "Bufferable write error occurs in Slave #10"]
2580        pub const _1: Self = Self::new(1);
2581    }
2582    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2583    pub struct Sbwerr11_SPEC;
2584    pub type Sbwerr11 = crate::EnumBitfieldStruct<u8, Sbwerr11_SPEC>;
2585    impl Sbwerr11 {
2586        #[doc = "No bufferable write error in Slave #11"]
2587        pub const _0: Self = Self::new(0);
2588
2589        #[doc = "Bufferable write error occurs in Slave #11"]
2590        pub const _1: Self = Self::new(1);
2591    }
2592    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2593    pub struct Sbwerr12_SPEC;
2594    pub type Sbwerr12 = crate::EnumBitfieldStruct<u8, Sbwerr12_SPEC>;
2595    impl Sbwerr12 {
2596        #[doc = "No bufferable write error in Slave #12"]
2597        pub const _0: Self = Self::new(0);
2598
2599        #[doc = "Bufferable write error occurs in Slave #12"]
2600        pub const _1: Self = Self::new(1);
2601    }
2602}
2603#[doc(hidden)]
2604#[derive(Copy, Clone, Eq, PartialEq)]
2605pub struct Sbwerrclr_SPEC;
2606impl crate::sealed::RegSpec for Sbwerrclr_SPEC {
2607    type DataType = u32;
2608}
2609
2610#[doc = "Slave Bufferable Write Error Clear Register"]
2611pub type Sbwerrclr = crate::RegValueT<Sbwerrclr_SPEC>;
2612
2613impl Sbwerrclr {
2614    #[doc = "Slave Bufferable Write Error Clear"]
2615    #[inline(always)]
2616    pub fn sbweclr0(
2617        self,
2618    ) -> crate::common::RegisterFieldBool<0, 1, 0, Sbwerrclr_SPEC, crate::common::RW> {
2619        crate::common::RegisterFieldBool::<0,1,0,Sbwerrclr_SPEC,crate::common::RW>::from_register(self,0)
2620    }
2621
2622    #[doc = "Slave Bufferable Write Error Clear"]
2623    #[inline(always)]
2624    pub fn sbweclr1(
2625        self,
2626    ) -> crate::common::RegisterFieldBool<1, 1, 0, Sbwerrclr_SPEC, crate::common::RW> {
2627        crate::common::RegisterFieldBool::<1,1,0,Sbwerrclr_SPEC,crate::common::RW>::from_register(self,0)
2628    }
2629
2630    #[doc = "Slave Bufferable Write Error Clear"]
2631    #[inline(always)]
2632    pub fn sbweclr2(
2633        self,
2634    ) -> crate::common::RegisterFieldBool<2, 1, 0, Sbwerrclr_SPEC, crate::common::RW> {
2635        crate::common::RegisterFieldBool::<2,1,0,Sbwerrclr_SPEC,crate::common::RW>::from_register(self,0)
2636    }
2637
2638    #[doc = "Slave Bufferable Write Error Clear"]
2639    #[inline(always)]
2640    pub fn sbweclr4(
2641        self,
2642    ) -> crate::common::RegisterFieldBool<4, 1, 0, Sbwerrclr_SPEC, crate::common::RW> {
2643        crate::common::RegisterFieldBool::<4,1,0,Sbwerrclr_SPEC,crate::common::RW>::from_register(self,0)
2644    }
2645
2646    #[doc = "Slave Bufferable Write Error Clear"]
2647    #[inline(always)]
2648    pub fn sbweclr5(
2649        self,
2650    ) -> crate::common::RegisterFieldBool<5, 1, 0, Sbwerrclr_SPEC, crate::common::RW> {
2651        crate::common::RegisterFieldBool::<5,1,0,Sbwerrclr_SPEC,crate::common::RW>::from_register(self,0)
2652    }
2653
2654    #[doc = "Slave Bufferable Write Error Clear"]
2655    #[inline(always)]
2656    pub fn sbweclr7(
2657        self,
2658    ) -> crate::common::RegisterFieldBool<7, 1, 0, Sbwerrclr_SPEC, crate::common::RW> {
2659        crate::common::RegisterFieldBool::<7,1,0,Sbwerrclr_SPEC,crate::common::RW>::from_register(self,0)
2660    }
2661
2662    #[doc = "Slave Bufferable Write Error Clear"]
2663    #[inline(always)]
2664    pub fn sbweclr8(
2665        self,
2666    ) -> crate::common::RegisterFieldBool<8, 1, 0, Sbwerrclr_SPEC, crate::common::RW> {
2667        crate::common::RegisterFieldBool::<8,1,0,Sbwerrclr_SPEC,crate::common::RW>::from_register(self,0)
2668    }
2669
2670    #[doc = "Slave Bufferable Write Error Clear"]
2671    #[inline(always)]
2672    pub fn sbweclr9(
2673        self,
2674    ) -> crate::common::RegisterFieldBool<9, 1, 0, Sbwerrclr_SPEC, crate::common::RW> {
2675        crate::common::RegisterFieldBool::<9,1,0,Sbwerrclr_SPEC,crate::common::RW>::from_register(self,0)
2676    }
2677
2678    #[doc = "Slave Bufferable Write Error Clear"]
2679    #[inline(always)]
2680    pub fn sbweclr10(
2681        self,
2682    ) -> crate::common::RegisterFieldBool<10, 1, 0, Sbwerrclr_SPEC, crate::common::RW> {
2683        crate::common::RegisterFieldBool::<10,1,0,Sbwerrclr_SPEC,crate::common::RW>::from_register(self,0)
2684    }
2685
2686    #[doc = "Slave Bufferable Write Error Clear"]
2687    #[inline(always)]
2688    pub fn sbweclr11(
2689        self,
2690    ) -> crate::common::RegisterFieldBool<11, 1, 0, Sbwerrclr_SPEC, crate::common::RW> {
2691        crate::common::RegisterFieldBool::<11,1,0,Sbwerrclr_SPEC,crate::common::RW>::from_register(self,0)
2692    }
2693
2694    #[doc = "Slave Bufferable Write Error Clear"]
2695    #[inline(always)]
2696    pub fn sbweclr12(
2697        self,
2698    ) -> crate::common::RegisterFieldBool<12, 1, 0, Sbwerrclr_SPEC, crate::common::RW> {
2699        crate::common::RegisterFieldBool::<12,1,0,Sbwerrclr_SPEC,crate::common::RW>::from_register(self,0)
2700    }
2701}
2702impl ::core::default::Default for Sbwerrclr {
2703    #[inline(always)]
2704    fn default() -> Sbwerrclr {
2705        <crate::RegValueT<Sbwerrclr_SPEC> as RegisterValue<_>>::new(0)
2706    }
2707}