[][src]Struct msp432p401r::flctl::RegisterBlock

#[repr(C)]pub struct RegisterBlock {
    pub flctl_power_stat: FLCTL_POWER_STAT,
    pub flctl_bank0_rdctl: FLCTL_BANK0_RDCTL,
    pub flctl_bank1_rdctl: FLCTL_BANK1_RDCTL,
    pub flctl_rdbrst_ctlstat: FLCTL_RDBRST_CTLSTAT,
    pub flctl_rdbrst_startaddr: FLCTL_RDBRST_STARTADDR,
    pub flctl_rdbrst_len: FLCTL_RDBRST_LEN,
    pub flctl_rdbrst_failaddr: FLCTL_RDBRST_FAILADDR,
    pub flctl_rdbrst_failcnt: FLCTL_RDBRST_FAILCNT,
    pub flctl_prg_ctlstat: FLCTL_PRG_CTLSTAT,
    pub flctl_prgbrst_ctlstat: FLCTL_PRGBRST_CTLSTAT,
    pub flctl_prgbrst_startaddr: FLCTL_PRGBRST_STARTADDR,
    pub flctl_prgbrst_data0_0: FLCTL_PRGBRST_DATA0_0,
    pub flctl_prgbrst_data0_1: FLCTL_PRGBRST_DATA0_1,
    pub flctl_prgbrst_data0_2: FLCTL_PRGBRST_DATA0_2,
    pub flctl_prgbrst_data0_3: FLCTL_PRGBRST_DATA0_3,
    pub flctl_prgbrst_data1_0: FLCTL_PRGBRST_DATA1_0,
    pub flctl_prgbrst_data1_1: FLCTL_PRGBRST_DATA1_1,
    pub flctl_prgbrst_data1_2: FLCTL_PRGBRST_DATA1_2,
    pub flctl_prgbrst_data1_3: FLCTL_PRGBRST_DATA1_3,
    pub flctl_prgbrst_data2_0: FLCTL_PRGBRST_DATA2_0,
    pub flctl_prgbrst_data2_1: FLCTL_PRGBRST_DATA2_1,
    pub flctl_prgbrst_data2_2: FLCTL_PRGBRST_DATA2_2,
    pub flctl_prgbrst_data2_3: FLCTL_PRGBRST_DATA2_3,
    pub flctl_prgbrst_data3_0: FLCTL_PRGBRST_DATA3_0,
    pub flctl_prgbrst_data3_1: FLCTL_PRGBRST_DATA3_1,
    pub flctl_prgbrst_data3_2: FLCTL_PRGBRST_DATA3_2,
    pub flctl_prgbrst_data3_3: FLCTL_PRGBRST_DATA3_3,
    pub flctl_erase_ctlstat: FLCTL_ERASE_CTLSTAT,
    pub flctl_erase_sectaddr: FLCTL_ERASE_SECTADDR,
    pub flctl_bank0_info_weprot: FLCTL_BANK0_INFO_WEPROT,
    pub flctl_bank0_main_weprot: FLCTL_BANK0_MAIN_WEPROT,
    pub flctl_bank1_info_weprot: FLCTL_BANK1_INFO_WEPROT,
    pub flctl_bank1_main_weprot: FLCTL_BANK1_MAIN_WEPROT,
    pub flctl_bmrk_ctlstat: FLCTL_BMRK_CTLSTAT,
    pub flctl_bmrk_ifetch: FLCTL_BMRK_IFETCH,
    pub flctl_bmrk_dread: FLCTL_BMRK_DREAD,
    pub flctl_bmrk_cmp: FLCTL_BMRK_CMP,
    pub flctl_ifg: FLCTL_IFG,
    pub flctl_ie: FLCTL_IE,
    pub flctl_clrifg: FLCTL_CLRIFG,
    pub flctl_setifg: FLCTL_SETIFG,
    pub flctl_read_timctl: FLCTL_READ_TIMCTL,
    pub flctl_readmargin_timctl: FLCTL_READMARGIN_TIMCTL,
    pub flctl_prgver_timctl: FLCTL_PRGVER_TIMCTL,
    pub flctl_ersver_timctl: FLCTL_ERSVER_TIMCTL,
    pub flctl_lkgver_timctl: FLCTL_LKGVER_TIMCTL,
    pub flctl_program_timctl: FLCTL_PROGRAM_TIMCTL,
    pub flctl_erase_timctl: FLCTL_ERASE_TIMCTL,
    pub flctl_masserase_timctl: FLCTL_MASSERASE_TIMCTL,
    pub flctl_burstprg_timctl: FLCTL_BURSTPRG_TIMCTL,
    // some fields omitted
}

Register block

Fields

flctl_power_stat: FLCTL_POWER_STAT

0x00 - Power Status Register

flctl_bank0_rdctl: FLCTL_BANK0_RDCTL

0x10 - Bank0 Read Control Register

flctl_bank1_rdctl: FLCTL_BANK1_RDCTL

0x14 - Bank1 Read Control Register

flctl_rdbrst_ctlstat: FLCTL_RDBRST_CTLSTAT

0x20 - Read Burst/Compare Control and Status Register

flctl_rdbrst_startaddr: FLCTL_RDBRST_STARTADDR

0x24 - Read Burst/Compare Start Address Register

flctl_rdbrst_len: FLCTL_RDBRST_LEN

0x28 - Read Burst/Compare Length Register

flctl_rdbrst_failaddr: FLCTL_RDBRST_FAILADDR

0x3c - Read Burst/Compare Fail Address Register

flctl_rdbrst_failcnt: FLCTL_RDBRST_FAILCNT

0x40 - Read Burst/Compare Fail Count Register

flctl_prg_ctlstat: FLCTL_PRG_CTLSTAT

0x50 - Program Control and Status Register

flctl_prgbrst_ctlstat: FLCTL_PRGBRST_CTLSTAT

0x54 - Program Burst Control and Status Register

flctl_prgbrst_startaddr: FLCTL_PRGBRST_STARTADDR

0x58 - Program Burst Start Address Register

flctl_prgbrst_data0_0: FLCTL_PRGBRST_DATA0_0

0x60 - Program Burst Data0 Register0

flctl_prgbrst_data0_1: FLCTL_PRGBRST_DATA0_1

0x64 - Program Burst Data0 Register1

flctl_prgbrst_data0_2: FLCTL_PRGBRST_DATA0_2

0x68 - Program Burst Data0 Register2

flctl_prgbrst_data0_3: FLCTL_PRGBRST_DATA0_3

0x6c - Program Burst Data0 Register3

flctl_prgbrst_data1_0: FLCTL_PRGBRST_DATA1_0

0x70 - Program Burst Data1 Register0

flctl_prgbrst_data1_1: FLCTL_PRGBRST_DATA1_1

0x74 - Program Burst Data1 Register1

flctl_prgbrst_data1_2: FLCTL_PRGBRST_DATA1_2

0x78 - Program Burst Data1 Register2

flctl_prgbrst_data1_3: FLCTL_PRGBRST_DATA1_3

0x7c - Program Burst Data1 Register3

flctl_prgbrst_data2_0: FLCTL_PRGBRST_DATA2_0

0x80 - Program Burst Data2 Register0

flctl_prgbrst_data2_1: FLCTL_PRGBRST_DATA2_1

0x84 - Program Burst Data2 Register1

flctl_prgbrst_data2_2: FLCTL_PRGBRST_DATA2_2

0x88 - Program Burst Data2 Register2

flctl_prgbrst_data2_3: FLCTL_PRGBRST_DATA2_3

0x8c - Program Burst Data2 Register3

flctl_prgbrst_data3_0: FLCTL_PRGBRST_DATA3_0

0x90 - Program Burst Data3 Register0

flctl_prgbrst_data3_1: FLCTL_PRGBRST_DATA3_1

0x94 - Program Burst Data3 Register1

flctl_prgbrst_data3_2: FLCTL_PRGBRST_DATA3_2

0x98 - Program Burst Data3 Register2

flctl_prgbrst_data3_3: FLCTL_PRGBRST_DATA3_3

0x9c - Program Burst Data3 Register3

flctl_erase_ctlstat: FLCTL_ERASE_CTLSTAT

0xa0 - Erase Control and Status Register

flctl_erase_sectaddr: FLCTL_ERASE_SECTADDR

0xa4 - Erase Sector Address Register

flctl_bank0_info_weprot: FLCTL_BANK0_INFO_WEPROT

0xb0 - Information Memory Bank0 Write/Erase Protection Register

flctl_bank0_main_weprot: FLCTL_BANK0_MAIN_WEPROT

0xb4 - Main Memory Bank0 Write/Erase Protection Register

flctl_bank1_info_weprot: FLCTL_BANK1_INFO_WEPROT

0xc0 - Information Memory Bank1 Write/Erase Protection Register

flctl_bank1_main_weprot: FLCTL_BANK1_MAIN_WEPROT

0xc4 - Main Memory Bank1 Write/Erase Protection Register

flctl_bmrk_ctlstat: FLCTL_BMRK_CTLSTAT

0xd0 - Benchmark Control and Status Register

flctl_bmrk_ifetch: FLCTL_BMRK_IFETCH

0xd4 - Benchmark Instruction Fetch Count Register

flctl_bmrk_dread: FLCTL_BMRK_DREAD

0xd8 - Benchmark Data Read Count Register

flctl_bmrk_cmp: FLCTL_BMRK_CMP

0xdc - Benchmark Count Compare Register

flctl_ifg: FLCTL_IFG

0xf0 - Interrupt Flag Register

flctl_ie: FLCTL_IE

0xf4 - Interrupt Enable Register

flctl_clrifg: FLCTL_CLRIFG

0xf8 - Clear Interrupt Flag Register

flctl_setifg: FLCTL_SETIFG

0xfc - Set Interrupt Flag Register

flctl_read_timctl: FLCTL_READ_TIMCTL

0x100 - Read Timing Control Register

flctl_readmargin_timctl: FLCTL_READMARGIN_TIMCTL

0x104 - Read Margin Timing Control Register

flctl_prgver_timctl: FLCTL_PRGVER_TIMCTL

0x108 - Program Verify Timing Control Register

flctl_ersver_timctl: FLCTL_ERSVER_TIMCTL

0x10c - Erase Verify Timing Control Register

flctl_lkgver_timctl: FLCTL_LKGVER_TIMCTL

0x110 - Leakage Verify Timing Control Register

flctl_program_timctl: FLCTL_PROGRAM_TIMCTL

0x114 - Program Timing Control Register

flctl_erase_timctl: FLCTL_ERASE_TIMCTL

0x118 - Erase Timing Control Register

flctl_masserase_timctl: FLCTL_MASSERASE_TIMCTL

0x11c - Mass Erase Timing Control Register

flctl_burstprg_timctl: FLCTL_BURSTPRG_TIMCTL

0x120 - Burst Program Timing Control Register

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