#[repr(C)]pub struct eMAC_TypeDef {Show 181 fields
pub NETWORK_CONTROL: u32,
pub NETWORK_CONFIG: u32,
pub NETWORK_STATUS: u32,
pub reserved31: u32,
pub DMA_CONFIG: u32,
pub TRANSMIT_STATUS: u32,
pub RECEIVE_Q_PTR: u32,
pub TRANSMIT_Q_PTR: u32,
pub RECEIVE_STATUS: u32,
pub INT_STATUS: u32,
pub INT_ENABLE: u32,
pub INT_DISABLE: u32,
pub INT_MASK: u32,
pub PHY_MANAGEMENT: u32,
pub PAUSE_TIME: u32,
pub TX_PAUSE_QUANTUM: u32,
pub PBUF_TXCUTTHRU: u32,
pub PBUF_RXCUTTHRU: u32,
pub JUMBO_MAX_LENGTH: u32,
pub reserved32: [u32; 2],
pub AXI_MAX_PIPELINE: u32,
pub reserved33: u32,
pub INT_MODERATION: u32,
pub SYS_WAKE_TIME: u32,
pub FATAL_OR_NON_FATAL_INT_SEL: u32,
pub LOCKUP_CONFIG: u32,
pub RX_MAC_LOCKUP_TIME: u32,
pub reserved34: [u32; 4],
pub HASH_BOTTOM: u32,
pub HASH_TOP: u32,
pub SPEC_ADD1_BOTTOM: u32,
pub SPEC_ADD1_TOP: u32,
pub SPEC_ADD2_BOTTOM: u32,
pub SPEC_ADD2_TOP: u32,
pub SPEC_ADD3_BOTTOM: u32,
pub SPEC_ADD3_TOP: u32,
pub SPEC_ADD4_BOTTOM: u32,
pub SPEC_ADD4_TOP: u32,
pub SPEC_TYPE1: u32,
pub SPEC_TYPE2: u32,
pub SPEC_TYPE3: u32,
pub SPEC_TYPE4: u32,
pub WOL_REGISTER: u32,
pub STRETCH_RATIO: u32,
pub STACKED_VLAN: u32,
pub TX_PFC_PAUSE: u32,
pub MASK_ADD1_BOTTOM: u32,
pub MASK_ADD1_TOP: u32,
pub DMA_ADDR_OR_MASK: u32,
pub RX_PTP_UNICAST: u32,
pub TX_PTP_UNICAST: u32,
pub TSU_NSEC_CMP: u32,
pub TSU_SEC_CMP: u32,
pub TSU_MSB_SEC_CMP: u32,
pub TSU_PTP_TX_MSB_SEC: u32,
pub TSU_PTP_RX_MSB_SEC: u32,
pub TSU_PEER_TX_MSB_SEC: u32,
pub TSU_PEER_RX_MSB_SEC: u32,
pub DPRAM_FILL_DBG: u32,
pub REVISION_REG: u32,
pub OCTETS_TXED_BOTTOM: u32,
pub OCTETS_TXED_TOP: u32,
pub FRAMES_TXED_OK: u32,
pub BROADCAST_TXED: u32,
pub MULTICAST_TXED: u32,
pub PAUSE_FRAMES_TXED: u32,
pub FRAMES_TXED_64: u32,
pub FRAMES_TXED_65: u32,
pub FRAMES_TXED_128: u32,
pub FRAMES_TXED_256: u32,
pub FRAMES_TXED_512: u32,
pub FRAMES_TXED_1024: u32,
pub FRAMES_TXED_1519: u32,
pub TX_UNDERRUNS: u32,
pub SINGLE_COLLISIONS: u32,
pub MULTIPLE_COLLISIONS: u32,
pub EXCESSIVE_COLLISIONS: u32,
pub LATE_COLLISIONS: u32,
pub DEFERRED_FRAMES: u32,
pub CRS_ERRORS: u32,
pub OCTETS_RXED_BOTTOM: u32,
pub OCTETS_RXED_TOP: u32,
pub FRAMES_RXED_OK: u32,
pub BROADCAST_RXED: u32,
pub MULTICAST_RXED: u32,
pub PAUSE_FRAMES_RXED: u32,
pub FRAMES_RXED_64: u32,
pub FRAMES_RXED_65: u32,
pub FRAMES_RXED_128: u32,
pub FRAMES_RXED_256: u32,
pub FRAMES_RXED_512: u32,
pub FRAMES_RXED_1024: u32,
pub FRAMES_RXED_1519: u32,
pub UNDERSIZE_FRAMES: u32,
pub EXCESSIVE_RX_LENGTH: u32,
pub RX_JABBERS: u32,
pub FCS_ERRORS: u32,
pub RX_LENGTH_ERRORS: u32,
pub RX_SYMBOL_ERRORS: u32,
pub ALIGNMENT_ERRORS: u32,
pub RX_RESOURCE_ERRORS: u32,
pub RX_OVERRUNS: u32,
pub RX_IP_CK_ERRORS: u32,
pub RX_TCP_CK_ERRORS: u32,
pub RX_UDP_CK_ERRORS: u32,
pub AUTO_FLUSHED_PKTS: u32,
pub reserved35: u32,
pub TSU_TIMER_INCR_SUB_NSEC: u32,
pub TSU_TIMER_MSB_SEC: u32,
pub TSU_STROBE_MSB_SEC: u32,
pub TSU_STROBE_SEC: u32,
pub TSU_STROBE_NSEC: u32,
pub TSU_TIMER_SEC: u32,
pub TSU_TIMER_NSEC: u32,
pub TSU_TIMER_ADJUST: u32,
pub TSU_TIMER_INCR: u32,
pub TSU_PTP_TX_SEC: u32,
pub TSU_PTP_TX_NSEC: u32,
pub TSU_PTP_RX_SEC: u32,
pub TSU_PTP_RX_NSEC: u32,
pub TSU_PEER_TX_SEC: u32,
pub TSU_PEER_TX_NSEC: u32,
pub TSU_PEER_RX_SEC: u32,
pub TSU_PEER_RX_NSEC: u32,
pub reserved36: [u32; 24],
pub TX_PAUSE_QUANTUM1: u32,
pub TX_PAUSE_QUANTUM2: u32,
pub TX_PAUSE_QUANTUM3: u32,
pub PFC_STATUS: u32,
pub RX_LPI: u32,
pub RX_LPI_TIME: u32,
pub TX_LPI: u32,
pub TX_LPI_TIME: u32,
pub DESIGNCFG_DEBUG1: u32,
pub DESIGNCFG_DEBUG2: u32,
pub DESIGNCFG_DEBUG3: u32,
pub DESIGNCFG_DEBUG4: u32,
pub DESIGNCFG_DEBUG5: u32,
pub DESIGNCFG_DEBUG6: u32,
pub DESIGNCFG_DEBUG7: u32,
pub DESIGNCFG_DEBUG8: u32,
pub DESIGNCFG_DEBUG9: u32,
pub DESIGNCFG_DEBUG10: u32,
pub DESIGNCFG_DEBUG11: u32,
pub DESIGNCFG_DEBUG12: u32,
pub reserved37: [u32; 12],
pub AXI_QoS_CFG_0: u32,
pub reserved37a: [u32; 118],
pub CBS_CONTROL: u32,
pub CBS_IDLESLOPE_Q_A: u32,
pub CBS_IDLESLOPE_Q_B: u32,
pub UPPER_TX_Q_BASE_ADDR: u32,
pub TX_BD_CONTROL: u32,
pub RX_BD_CONTROL: u32,
pub UPPER_RX_Q_BASE_ADDR: u32,
pub reserved38: [u32; 10],
pub SCREENING_TYPE_1_REGISTER_0: u32,
pub reserved39: [u32; 15],
pub SCREENING_TYPE_2_REGISTER_0: u32,
pub SCREENING_TYPE_2_REGISTER_1: u32,
pub reserved40: [u32; 110],
pub TYPE2_COMPARE_0_WORD_0: u32,
pub TYPE2_COMPARE_0_WORD_1: u32,
pub TYPE2_COMPARE_1_WORD_0: u32,
pub TYPE2_COMPARE_1_WORD_1: u32,
pub TYPE2_COMPARE_2_WORD_0: u32,
pub TYPE2_COMPARE_2_WORD_1: u32,
pub TYPE2_COMPARE_3_WORD_0: u32,
pub TYPE2_COMPARE_3_WORD_1: u32,
pub TYPE2_COMPARE_4_WORD_0: u32,
pub TYPE2_COMPARE_4_WORD_1: u32,
pub TYPE2_COMPARE_5_WORD_0: u32,
pub TYPE2_COMPARE_5_WORD_1: u32,
pub reserved41: [u32; 52],
pub ENST_START_TIME: u32,
pub reserved42: [u32; 7],
pub ENST_ON_TIME: u32,
pub reserved43: [u32; 7],
pub ENST_OFF_TIME: u32,
pub reserved44: [u32; 15],
pub ENST_CONTROL: u32,
}
Fields§
§NETWORK_CONTROL: u32
§NETWORK_CONFIG: u32
§NETWORK_STATUS: u32
§reserved31: u32
§DMA_CONFIG: u32
§TRANSMIT_STATUS: u32
§RECEIVE_Q_PTR: u32
§TRANSMIT_Q_PTR: u32
§RECEIVE_STATUS: u32
§INT_STATUS: u32
§INT_ENABLE: u32
§INT_DISABLE: u32
§INT_MASK: u32
§PHY_MANAGEMENT: u32
§PAUSE_TIME: u32
§TX_PAUSE_QUANTUM: u32
§PBUF_TXCUTTHRU: u32
§PBUF_RXCUTTHRU: u32
§JUMBO_MAX_LENGTH: u32
§reserved32: [u32; 2]
§AXI_MAX_PIPELINE: u32
§reserved33: u32
§INT_MODERATION: u32
§SYS_WAKE_TIME: u32
§FATAL_OR_NON_FATAL_INT_SEL: u32
§LOCKUP_CONFIG: u32
§RX_MAC_LOCKUP_TIME: u32
§reserved34: [u32; 4]
§HASH_BOTTOM: u32
§HASH_TOP: u32
§SPEC_ADD1_BOTTOM: u32
§SPEC_ADD1_TOP: u32
§SPEC_ADD2_BOTTOM: u32
§SPEC_ADD2_TOP: u32
§SPEC_ADD3_BOTTOM: u32
§SPEC_ADD3_TOP: u32
§SPEC_ADD4_BOTTOM: u32
§SPEC_ADD4_TOP: u32
§SPEC_TYPE1: u32
§SPEC_TYPE2: u32
§SPEC_TYPE3: u32
§SPEC_TYPE4: u32
§WOL_REGISTER: u32
§STRETCH_RATIO: u32
§STACKED_VLAN: u32
§TX_PFC_PAUSE: u32
§MASK_ADD1_BOTTOM: u32
§MASK_ADD1_TOP: u32
§DMA_ADDR_OR_MASK: u32
§RX_PTP_UNICAST: u32
§TX_PTP_UNICAST: u32
§TSU_NSEC_CMP: u32
§TSU_SEC_CMP: u32
§TSU_MSB_SEC_CMP: u32
§TSU_PTP_TX_MSB_SEC: u32
§TSU_PTP_RX_MSB_SEC: u32
§TSU_PEER_TX_MSB_SEC: u32
§TSU_PEER_RX_MSB_SEC: u32
§DPRAM_FILL_DBG: u32
§REVISION_REG: u32
§OCTETS_TXED_BOTTOM: u32
§OCTETS_TXED_TOP: u32
§FRAMES_TXED_OK: u32
§BROADCAST_TXED: u32
§MULTICAST_TXED: u32
§PAUSE_FRAMES_TXED: u32
§FRAMES_TXED_64: u32
§FRAMES_TXED_65: u32
§FRAMES_TXED_128: u32
§FRAMES_TXED_256: u32
§FRAMES_TXED_512: u32
§FRAMES_TXED_1024: u32
§FRAMES_TXED_1519: u32
§TX_UNDERRUNS: u32
§SINGLE_COLLISIONS: u32
§MULTIPLE_COLLISIONS: u32
§EXCESSIVE_COLLISIONS: u32
§LATE_COLLISIONS: u32
§DEFERRED_FRAMES: u32
§CRS_ERRORS: u32
§OCTETS_RXED_BOTTOM: u32
§OCTETS_RXED_TOP: u32
§FRAMES_RXED_OK: u32
§BROADCAST_RXED: u32
§MULTICAST_RXED: u32
§PAUSE_FRAMES_RXED: u32
§FRAMES_RXED_64: u32
§FRAMES_RXED_65: u32
§FRAMES_RXED_128: u32
§FRAMES_RXED_256: u32
§FRAMES_RXED_512: u32
§FRAMES_RXED_1024: u32
§FRAMES_RXED_1519: u32
§UNDERSIZE_FRAMES: u32
§EXCESSIVE_RX_LENGTH: u32
§RX_JABBERS: u32
§FCS_ERRORS: u32
§RX_LENGTH_ERRORS: u32
§RX_SYMBOL_ERRORS: u32
§ALIGNMENT_ERRORS: u32
§RX_RESOURCE_ERRORS: u32
§RX_OVERRUNS: u32
§RX_IP_CK_ERRORS: u32
§RX_TCP_CK_ERRORS: u32
§RX_UDP_CK_ERRORS: u32
§AUTO_FLUSHED_PKTS: u32
§reserved35: u32
§TSU_TIMER_INCR_SUB_NSEC: u32
§TSU_TIMER_MSB_SEC: u32
§TSU_STROBE_MSB_SEC: u32
§TSU_STROBE_SEC: u32
§TSU_STROBE_NSEC: u32
§TSU_TIMER_SEC: u32
§TSU_TIMER_NSEC: u32
§TSU_TIMER_ADJUST: u32
§TSU_TIMER_INCR: u32
§TSU_PTP_TX_SEC: u32
§TSU_PTP_TX_NSEC: u32
§TSU_PTP_RX_SEC: u32
§TSU_PTP_RX_NSEC: u32
§TSU_PEER_TX_SEC: u32
§TSU_PEER_TX_NSEC: u32
§TSU_PEER_RX_SEC: u32
§TSU_PEER_RX_NSEC: u32
§reserved36: [u32; 24]
§TX_PAUSE_QUANTUM1: u32
§TX_PAUSE_QUANTUM2: u32
§TX_PAUSE_QUANTUM3: u32
§PFC_STATUS: u32
§RX_LPI: u32
§RX_LPI_TIME: u32
§TX_LPI: u32
§TX_LPI_TIME: u32
§DESIGNCFG_DEBUG1: u32
§DESIGNCFG_DEBUG2: u32
§DESIGNCFG_DEBUG3: u32
§DESIGNCFG_DEBUG4: u32
§DESIGNCFG_DEBUG5: u32
§DESIGNCFG_DEBUG6: u32
§DESIGNCFG_DEBUG7: u32
§DESIGNCFG_DEBUG8: u32
§DESIGNCFG_DEBUG9: u32
§DESIGNCFG_DEBUG10: u32
§DESIGNCFG_DEBUG11: u32
§DESIGNCFG_DEBUG12: u32
§reserved37: [u32; 12]
§AXI_QoS_CFG_0: u32
§reserved37a: [u32; 118]
§CBS_CONTROL: u32
§CBS_IDLESLOPE_Q_A: u32
§CBS_IDLESLOPE_Q_B: u32
§UPPER_TX_Q_BASE_ADDR: u32
§TX_BD_CONTROL: u32
§RX_BD_CONTROL: u32
§UPPER_RX_Q_BASE_ADDR: u32
§reserved38: [u32; 10]
§SCREENING_TYPE_1_REGISTER_0: u32
§reserved39: [u32; 15]
§SCREENING_TYPE_2_REGISTER_0: u32
§SCREENING_TYPE_2_REGISTER_1: u32
§reserved40: [u32; 110]
§TYPE2_COMPARE_0_WORD_0: u32
§TYPE2_COMPARE_0_WORD_1: u32
§TYPE2_COMPARE_1_WORD_0: u32
§TYPE2_COMPARE_1_WORD_1: u32
§TYPE2_COMPARE_2_WORD_0: u32
§TYPE2_COMPARE_2_WORD_1: u32
§TYPE2_COMPARE_3_WORD_0: u32
§TYPE2_COMPARE_3_WORD_1: u32
§TYPE2_COMPARE_4_WORD_0: u32
§TYPE2_COMPARE_4_WORD_1: u32
§TYPE2_COMPARE_5_WORD_0: u32
§TYPE2_COMPARE_5_WORD_1: u32
§reserved41: [u32; 52]
§ENST_START_TIME: u32
§reserved42: [u32; 7]
§ENST_ON_TIME: u32
§reserved43: [u32; 7]
§ENST_OFF_TIME: u32
§reserved44: [u32; 15]
§ENST_CONTROL: u32
Trait Implementations§
Source§impl Clone for eMAC_TypeDef
impl Clone for eMAC_TypeDef
Source§fn clone(&self) -> eMAC_TypeDef
fn clone(&self) -> eMAC_TypeDef
Returns a duplicate of the value. Read more
1.0.0 · Source§const fn clone_from(&mut self, source: &Self)
const fn clone_from(&mut self, source: &Self)
Performs copy-assignment from
source
. Read moreSource§impl Debug for eMAC_TypeDef
impl Debug for eMAC_TypeDef
impl Copy for eMAC_TypeDef
Auto Trait Implementations§
impl Freeze for eMAC_TypeDef
impl RefUnwindSafe for eMAC_TypeDef
impl Send for eMAC_TypeDef
impl Sync for eMAC_TypeDef
impl Unpin for eMAC_TypeDef
impl UnwindSafe for eMAC_TypeDef
Blanket Implementations§
Source§impl<T> BorrowMut<T> for Twhere
T: ?Sized,
impl<T> BorrowMut<T> for Twhere
T: ?Sized,
Source§fn borrow_mut(&mut self) -> &mut T
fn borrow_mut(&mut self) -> &mut T
Mutably borrows from an owned value. Read more