mpfs_pac

Struct MAC_TypeDef

Source 
#[repr(C)]
pub struct MAC_TypeDef {
Show 260 fields
    pub NETWORK_CONTROL: u32,
    pub NETWORK_CONFIG: u32,
    pub NETWORK_STATUS: u32,
    pub USER_IO: u32,
    pub DMA_CONFIG: u32,
    pub TRANSMIT_STATUS: u32,
    pub RECEIVE_Q_PTR: u32,
    pub TRANSMIT_Q_PTR: u32,
    pub RECEIVE_STATUS: u32,
    pub INT_STATUS: u32,
    pub INT_ENABLE: u32,
    pub INT_DISABLE: u32,
    pub INT_MASK: u32,
    pub PHY_MANAGEMENT: u32,
    pub PAUSE_TIME: u32,
    pub TX_PAUSE_QUANTUM: u32,
    pub PBUF_TXCUTTHRU: u32,
    pub PBUF_RXCUTTHRU: u32,
    pub JUMBO_MAX_LENGTH: u32,
    pub reserved1: u32,
    pub reserved2: u32,
    pub AXI_MAX_PIPELINE: u32,
    pub reserved3: u32,
    pub INT_MODERATION: u32,
    pub SYS_WAKE_TIME: u32,
    pub FATAL_OR_NON_FATAL_INT_SEL: u32,
    pub LOCKUP_CONFIG: u32,
    pub RX_MAC_LOCKUP_TIME: u32,
    pub reserved4: u32,
    pub reserved5: u32,
    pub reserved6: u32,
    pub reserved7: u32,
    pub HASH_BOTTOM: u32,
    pub HASH_TOP: u32,
    pub SPEC_ADD1_BOTTOM: u32,
    pub SPEC_ADD1_TOP: u32,
    pub SPEC_ADD2_BOTTOM: u32,
    pub SPEC_ADD2_TOP: u32,
    pub SPEC_ADD3_BOTTOM: u32,
    pub SPEC_ADD3_TOP: u32,
    pub SPEC_ADD4_BOTTOM: u32,
    pub SPEC_ADD4_TOP: u32,
    pub SPEC_TYPE1: u32,
    pub SPEC_TYPE2: u32,
    pub SPEC_TYPE3: u32,
    pub SPEC_TYPE4: u32,
    pub WOL_REGISTER: u32,
    pub STRETCH_RATIO: u32,
    pub STACKED_VLAN: u32,
    pub TX_PFC_PAUSE: u32,
    pub MASK_ADD1_BOTTOM: u32,
    pub MASK_ADD1_TOP: u32,
    pub DMA_ADDR_OR_MASK: u32,
    pub RX_PTP_UNICAST: u32,
    pub TX_PTP_UNICAST: u32,
    pub TSU_NSEC_CMP: u32,
    pub TSU_SEC_CMP: u32,
    pub TSU_MSB_SEC_CMP: u32,
    pub TSU_PTP_TX_MSB_SEC_CMP: u32,
    pub TSU_PTP_RX_MSB_SEC_CMP: u32,
    pub TSU_PEER_TX_MSB_SEC_CMP: u32,
    pub TSU_PEER_RX_MSB_SEC_CMP: u32,
    pub DPRAM_FILL_DBG: u32,
    pub REVISION_REG: u32,
    pub OCTETS_TXED_BOTTOM: u32,
    pub OCTETS_TXED_TOP: u32,
    pub FRAMES_TXED_OK: u32,
    pub BROADCAST_TXED: u32,
    pub MULTICAST_TXED: u32,
    pub PAUSE_FRAMES_TXED: u32,
    pub FRAMES_TXED_64: u32,
    pub FRAMES_TXED_65: u32,
    pub FRAMES_TXED_128: u32,
    pub FRAMES_TXED_256: u32,
    pub FRAMES_TXED_512: u32,
    pub FRAMES_TXED_1024: u32,
    pub FRAMES_TXED_1519: u32,
    pub TX_UNDERRUNS: u32,
    pub SINGLE_COLLISIONS: u32,
    pub MULTIPLE_COLLISIONS: u32,
    pub EXCESSIVE_COLLISIONS: u32,
    pub LATE_COLLISIONS: u32,
    pub DEFERRED_FRAMES: u32,
    pub CRS_ERRORS: u32,
    pub OCTETS_RXED_BOTTOM: u32,
    pub OCTETS_RXED_TOP: u32,
    pub FRAMES_RXED_OK: u32,
    pub BROADCAST_RXED: u32,
    pub MULTICAST_RXED: u32,
    pub PAUSE_FRAMES_RXED: u32,
    pub FRAMES_RXED_64: u32,
    pub FRAMES_RXED_65: u32,
    pub FRAMES_RXED_128: u32,
    pub FRAMES_RXED_256: u32,
    pub FRAMES_RXED_512: u32,
    pub FRAMES_RXED_1024: u32,
    pub FRAMES_RXED_1519: u32,
    pub UNDERSIZE_FRAMES: u32,
    pub EXCESSIVE_RX_LENGTH: u32,
    pub RX_JABBERS: u32,
    pub FCS_ERRORS: u32,
    pub RX_LENGTH_ERRORS: u32,
    pub RX_SYMBOL_ERRORS: u32,
    pub ALIGNMENT_ERRORS: u32,
    pub RX_RESOURCE_ERRORS: u32,
    pub RX_OVERRUNS: u32,
    pub RX_IP_CK_ERRORS: u32,
    pub RX_TCP_CK_ERRORS: u32,
    pub RX_UDP_CK_ERRORS: u32,
    pub AUTO_FLUSHED_PKTS: u32,
    pub reserved8: u32,
    pub TSU_TIMER_INCR_SUB_NSEC: u32,
    pub TSU_TIMER_MSB_SEC: u32,
    pub TSU_STROBE_MSB_SEC: u32,
    pub TSU_STROBE_SEC: u32,
    pub TSU_STROBE_NSEC: u32,
    pub TSU_TIMER_SEC: u32,
    pub TSU_TIMER_NSEC: u32,
    pub TSU_TIMER_ADJUST: u32,
    pub TSU_TIMER_INCR: u32,
    pub TSU_PTP_TX_SEC: u32,
    pub TSU_PTP_TX_NSEC: u32,
    pub TSU_PTP_RX_SEC: u32,
    pub TSU_PTP_RX_NSEC: u32,
    pub TSU_PEER_TX_SEC: u32,
    pub TSU_PEER_TX_NSEC: u32,
    pub TSU_PEER_RX_SEC: u32,
    pub TSU_PEER_RX_NSEC: u32,
    pub PCS_CONTROL: u32,
    pub PCS_STATUS: u32,
    pub PCS_PHY_TOP_ID: u32,
    pub PCS_PHY_BOT_ID: u32,
    pub PCS_AN_ADV: u32,
    pub PCS_AN_LP_BASE: u32,
    pub PCS_AN_EXP: u32,
    pub PCS_AN_NP_TX: u32,
    pub PCS_AN_LP_NP: u32,
    pub reserved9: [u32; 6],
    pub PCS_AN_EXT_STATUS: u32,
    pub reserved10: [u32; 8],
    pub TX_PAUSE_QUANTUM1: u32,
    pub TX_PAUSE_QUANTUM2: u32,
    pub TX_PAUSE_QUANTUM3: u32,
    pub PFC_STATUS: u32,
    pub RX_LPI: u32,
    pub RX_LPI_TIME: u32,
    pub TX_LPI: u32,
    pub TX_LPI_TIME: u32,
    pub DESIGNCFG_DEBUG1: u32,
    pub DESIGNCFG_DEBUG2: u32,
    pub DESIGNCFG_DEBUG3: u32,
    pub DESIGNCFG_DEBUG4: u32,
    pub DESIGNCFG_DEBUG5: u32,
    pub DESIGNCFG_DEBUG6: u32,
    pub DESIGNCFG_DEBUG7: u32,
    pub DESIGNCFG_DEBUG8: u32,
    pub DESIGNCFG_DEBUG9: u32,
    pub DESIGNCFG_DEBUG10: u32,
    pub DESIGNCFG_DEBUG11: u32,
    pub DESIGNCFG_DEBUG12: u32,
    pub reserved11: [u32; 12],
    pub AXI_QoS_CFG_0: u32,
    pub reserved11a: [u32; 71],
    pub INT_Q1_STATUS: u32,
    pub INT_Q2_STATUS: u32,
    pub INT_Q3_STATUS: u32,
    pub reserved12: [u32; 13],
    pub TRANSMIT_Q1_PTR: u32,
    pub TRANSMIT_Q2_PTR: u32,
    pub TRANSMIT_Q3_PTR: u32,
    pub reserved13: [u32; 13],
    pub RECEIVE_Q1_PTR: u32,
    pub RECEIVE_Q2_PTR: u32,
    pub RECEIVE_Q3_PTR: u32,
    pub reserved14: [u32; 5],
    pub DMA_RXBUF_SIZE_Q1: u32,
    pub DMA_RXBUF_SIZE_Q2: u32,
    pub DMA_RXBUF_SIZE_Q3: u32,
    pub reserved15: [u32; 4],
    pub CBS_CONTROL: u32,
    pub CBS_IDLESLOPE_Q_A: u32,
    pub CBS_IDLESLOPE_Q_B: u32,
    pub UPPER_TX_Q_BASE_ADDR: u32,
    pub TX_BD_CONTROL: u32,
    pub RX_BD_CONTROL: u32,
    pub UPPER_RX_Q_BASE_ADDR: u32,
    pub reserved16: [u32; 5],
    pub WD_COUNTER: u32,
    pub reserved17: [u32; 2],
    pub AXI_TX_FULL_THRESH0: u32,
    pub AXI_TX_FULL_THRESH1: u32,
    pub SCREENING_TYPE_1_REGISTER_0: u32,
    pub SCREENING_TYPE_1_REGISTER_1: u32,
    pub SCREENING_TYPE_1_REGISTER_2: u32,
    pub SCREENING_TYPE_1_REGISTER_3: u32,
    pub reserved18: [u32; 12],
    pub SCREENING_TYPE_2_REGISTER_0: u32,
    pub SCREENING_TYPE_2_REGISTER_1: u32,
    pub SCREENING_TYPE_2_REGISTER_2: u32,
    pub SCREENING_TYPE_2_REGISTER_3: u32,
    pub reserved18b: [u32; 12],
    pub TX_SCHED_CTRL: u32,
    pub reserved19: [u32; 3],
    pub BW_RATE_LIMIT_Q0TO3: u32,
    pub reserved20: [u32; 3],
    pub TX_Q_SEG_ALLOC_Q0TO3: u32,
    pub reserved21: [u32; 23],
    pub INT_Q1_ENABLE: u32,
    pub INT_Q2_ENABLE: u32,
    pub INT_Q3_ENABLE: u32,
    pub reserved22: [u32; 5],
    pub INT_Q1_DISABLE: u32,
    pub INT_Q2_DISABLE: u32,
    pub INT_Q3_DISABLE: u32,
    pub reserved23: [u32; 5],
    pub INT_Q1_MASK: u32,
    pub INT_Q2_MASK: u32,
    pub INT_Q3_MASK: u32,
    pub reserved24: [u32; 37],
    pub SCREENING_TYPE_2_ETHERTYPE_REG_0: u32,
    pub SCREENING_TYPE_2_ETHERTYPE_REG_1: u32,
    pub SCREENING_TYPE_2_ETHERTYPE_REG_2: u32,
    pub SCREENING_TYPE_2_ETHERTYPE_REG_3: u32,
    pub reserved25: [u32; 4],
    pub TYPE2_COMPARE_0_WORD_0: u32,
    pub TYPE2_COMPARE_0_WORD_1: u32,
    pub TYPE2_COMPARE_1_WORD_0: u32,
    pub TYPE2_COMPARE_1_WORD_1: u32,
    pub TYPE2_COMPARE_2_WORD_0: u32,
    pub TYPE2_COMPARE_2_WORD_1: u32,
    pub TYPE2_COMPARE_3_WORD_0: u32,
    pub TYPE2_COMPARE_3_WORD_1: u32,
    pub reserved26: [u32; 56],
    pub ENST_START_TIME_Q0: u32,
    pub ENST_START_TIME_Q1: u32,
    pub ENST_START_TIME_Q2: u32,
    pub ENST_START_TIME_Q3: u32,
    pub reserved27: [u32; 4],
    pub ENST_ON_TIME_Q0: u32,
    pub ENST_ON_TIME_Q1: u32,
    pub ENST_ON_TIME_Q2: u32,
    pub ENST_ON_TIME_Q3: u32,
    pub reserved28: [u32; 4],
    pub ENST_OFF_TIME_Q0: u32,
    pub ENST_OFF_TIME_Q1: u32,
    pub ENST_OFF_TIME_Q2: u32,
    pub ENST_OFF_TIME_Q3: u32,
    pub ENST_CONTROL: u32,
    pub reserved29: [u32; 427],
    pub MMSL_CONTROL: u32,
    pub MMSL_STATUS: u32,
    pub MMSL_ERR_STATS: u32,
    pub MMSL_ASS_OK_COUNT: u32,
    pub MMSL_FRAG_COUNT_RX: u32,
    pub MMSL_FRAG_COUNT_TX: u32,
    pub MMSL_INT_STATUS: u32,
    pub MMSL_INT_ENABLE: u32,
    pub MMSL_INT_DISABLE: u32,
    pub MMSL_INT_MASK: u32,
    pub reserved30: [u32; 54],

}

Fields§

§NETWORK_CONTROL: u32§NETWORK_CONFIG: u32§NETWORK_STATUS: u32§USER_IO: u32§DMA_CONFIG: u32§TRANSMIT_STATUS: u32§RECEIVE_Q_PTR: u32§TRANSMIT_Q_PTR: u32§RECEIVE_STATUS: u32§INT_STATUS: u32§INT_ENABLE: u32§INT_DISABLE: u32§INT_MASK: u32§PHY_MANAGEMENT: u32§PAUSE_TIME: u32§TX_PAUSE_QUANTUM: u32§PBUF_TXCUTTHRU: u32§PBUF_RXCUTTHRU: u32§JUMBO_MAX_LENGTH: u32§reserved1: u32§reserved2: u32§AXI_MAX_PIPELINE: u32§reserved3: u32§INT_MODERATION: u32§SYS_WAKE_TIME: u32§FATAL_OR_NON_FATAL_INT_SEL: u32§LOCKUP_CONFIG: u32§RX_MAC_LOCKUP_TIME: u32§reserved4: u32§reserved5: u32§reserved6: u32§reserved7: u32§HASH_BOTTOM: u32§HASH_TOP: u32§SPEC_ADD1_BOTTOM: u32§SPEC_ADD1_TOP: u32§SPEC_ADD2_BOTTOM: u32§SPEC_ADD2_TOP: u32§SPEC_ADD3_BOTTOM: u32§SPEC_ADD3_TOP: u32§SPEC_ADD4_BOTTOM: u32§SPEC_ADD4_TOP: u32§SPEC_TYPE1: u32§SPEC_TYPE2: u32§SPEC_TYPE3: u32§SPEC_TYPE4: u32§WOL_REGISTER: u32§STRETCH_RATIO: u32§STACKED_VLAN: u32§TX_PFC_PAUSE: u32§MASK_ADD1_BOTTOM: u32§MASK_ADD1_TOP: u32§DMA_ADDR_OR_MASK: u32§RX_PTP_UNICAST: u32§TX_PTP_UNICAST: u32§TSU_NSEC_CMP: u32§TSU_SEC_CMP: u32§TSU_MSB_SEC_CMP: u32§TSU_PTP_TX_MSB_SEC_CMP: u32§TSU_PTP_RX_MSB_SEC_CMP: u32§TSU_PEER_TX_MSB_SEC_CMP: u32§TSU_PEER_RX_MSB_SEC_CMP: u32§DPRAM_FILL_DBG: u32§REVISION_REG: u32§OCTETS_TXED_BOTTOM: u32§OCTETS_TXED_TOP: u32§FRAMES_TXED_OK: u32§BROADCAST_TXED: u32§MULTICAST_TXED: u32§PAUSE_FRAMES_TXED: u32§FRAMES_TXED_64: u32§FRAMES_TXED_65: u32§FRAMES_TXED_128: u32§FRAMES_TXED_256: u32§FRAMES_TXED_512: u32§FRAMES_TXED_1024: u32§FRAMES_TXED_1519: u32§TX_UNDERRUNS: u32§SINGLE_COLLISIONS: u32§MULTIPLE_COLLISIONS: u32§EXCESSIVE_COLLISIONS: u32§LATE_COLLISIONS: u32§DEFERRED_FRAMES: u32§CRS_ERRORS: u32§OCTETS_RXED_BOTTOM: u32§OCTETS_RXED_TOP: u32§FRAMES_RXED_OK: u32§BROADCAST_RXED: u32§MULTICAST_RXED: u32§PAUSE_FRAMES_RXED: u32§FRAMES_RXED_64: u32§FRAMES_RXED_65: u32§FRAMES_RXED_128: u32§FRAMES_RXED_256: u32§FRAMES_RXED_512: u32§FRAMES_RXED_1024: u32§FRAMES_RXED_1519: u32§UNDERSIZE_FRAMES: u32§EXCESSIVE_RX_LENGTH: u32§RX_JABBERS: u32§FCS_ERRORS: u32§RX_LENGTH_ERRORS: u32§RX_SYMBOL_ERRORS: u32§ALIGNMENT_ERRORS: u32§RX_RESOURCE_ERRORS: u32§RX_OVERRUNS: u32§RX_IP_CK_ERRORS: u32§RX_TCP_CK_ERRORS: u32§RX_UDP_CK_ERRORS: u32§AUTO_FLUSHED_PKTS: u32§reserved8: u32§TSU_TIMER_INCR_SUB_NSEC: u32§TSU_TIMER_MSB_SEC: u32§TSU_STROBE_MSB_SEC: u32§TSU_STROBE_SEC: u32§TSU_STROBE_NSEC: u32§TSU_TIMER_SEC: u32§TSU_TIMER_NSEC: u32§TSU_TIMER_ADJUST: u32§TSU_TIMER_INCR: u32§TSU_PTP_TX_SEC: u32§TSU_PTP_TX_NSEC: u32§TSU_PTP_RX_SEC: u32§TSU_PTP_RX_NSEC: u32§TSU_PEER_TX_SEC: u32§TSU_PEER_TX_NSEC: u32§TSU_PEER_RX_SEC: u32§TSU_PEER_RX_NSEC: u32§PCS_CONTROL: u32§PCS_STATUS: u32§PCS_PHY_TOP_ID: u32§PCS_PHY_BOT_ID: u32§PCS_AN_ADV: u32§PCS_AN_LP_BASE: u32§PCS_AN_EXP: u32§PCS_AN_NP_TX: u32§PCS_AN_LP_NP: u32§reserved9: [u32; 6]§PCS_AN_EXT_STATUS: u32§reserved10: [u32; 8]§TX_PAUSE_QUANTUM1: u32§TX_PAUSE_QUANTUM2: u32§TX_PAUSE_QUANTUM3: u32§PFC_STATUS: u32§RX_LPI: u32§RX_LPI_TIME: u32§TX_LPI: u32§TX_LPI_TIME: u32§DESIGNCFG_DEBUG1: u32§DESIGNCFG_DEBUG2: u32§DESIGNCFG_DEBUG3: u32§DESIGNCFG_DEBUG4: u32§DESIGNCFG_DEBUG5: u32§DESIGNCFG_DEBUG6: u32§DESIGNCFG_DEBUG7: u32§DESIGNCFG_DEBUG8: u32§DESIGNCFG_DEBUG9: u32§DESIGNCFG_DEBUG10: u32§DESIGNCFG_DEBUG11: u32§DESIGNCFG_DEBUG12: u32§reserved11: [u32; 12]§AXI_QoS_CFG_0: u32§reserved11a: [u32; 71]§INT_Q1_STATUS: u32§INT_Q2_STATUS: u32§INT_Q3_STATUS: u32§reserved12: [u32; 13]§TRANSMIT_Q1_PTR: u32§TRANSMIT_Q2_PTR: u32§TRANSMIT_Q3_PTR: u32§reserved13: [u32; 13]§RECEIVE_Q1_PTR: u32§RECEIVE_Q2_PTR: u32§RECEIVE_Q3_PTR: u32§reserved14: [u32; 5]§DMA_RXBUF_SIZE_Q1: u32§DMA_RXBUF_SIZE_Q2: u32§DMA_RXBUF_SIZE_Q3: u32§reserved15: [u32; 4]§CBS_CONTROL: u32§CBS_IDLESLOPE_Q_A: u32§CBS_IDLESLOPE_Q_B: u32§UPPER_TX_Q_BASE_ADDR: u32§TX_BD_CONTROL: u32§RX_BD_CONTROL: u32§UPPER_RX_Q_BASE_ADDR: u32§reserved16: [u32; 5]§WD_COUNTER: u32§reserved17: [u32; 2]§AXI_TX_FULL_THRESH0: u32§AXI_TX_FULL_THRESH1: u32§SCREENING_TYPE_1_REGISTER_0: u32§SCREENING_TYPE_1_REGISTER_1: u32§SCREENING_TYPE_1_REGISTER_2: u32§SCREENING_TYPE_1_REGISTER_3: u32§reserved18: [u32; 12]§SCREENING_TYPE_2_REGISTER_0: u32§SCREENING_TYPE_2_REGISTER_1: u32§SCREENING_TYPE_2_REGISTER_2: u32§SCREENING_TYPE_2_REGISTER_3: u32§reserved18b: [u32; 12]§TX_SCHED_CTRL: u32§reserved19: [u32; 3]§BW_RATE_LIMIT_Q0TO3: u32§reserved20: [u32; 3]§TX_Q_SEG_ALLOC_Q0TO3: u32§reserved21: [u32; 23]§INT_Q1_ENABLE: u32§INT_Q2_ENABLE: u32§INT_Q3_ENABLE: u32§reserved22: [u32; 5]§INT_Q1_DISABLE: u32§INT_Q2_DISABLE: u32§INT_Q3_DISABLE: u32§reserved23: [u32; 5]§INT_Q1_MASK: u32§INT_Q2_MASK: u32§INT_Q3_MASK: u32§reserved24: [u32; 37]§SCREENING_TYPE_2_ETHERTYPE_REG_0: u32§SCREENING_TYPE_2_ETHERTYPE_REG_1: u32§SCREENING_TYPE_2_ETHERTYPE_REG_2: u32§SCREENING_TYPE_2_ETHERTYPE_REG_3: u32§reserved25: [u32; 4]§TYPE2_COMPARE_0_WORD_0: u32§TYPE2_COMPARE_0_WORD_1: u32§TYPE2_COMPARE_1_WORD_0: u32§TYPE2_COMPARE_1_WORD_1: u32§TYPE2_COMPARE_2_WORD_0: u32§TYPE2_COMPARE_2_WORD_1: u32§TYPE2_COMPARE_3_WORD_0: u32§TYPE2_COMPARE_3_WORD_1: u32§reserved26: [u32; 56]§ENST_START_TIME_Q0: u32§ENST_START_TIME_Q1: u32§ENST_START_TIME_Q2: u32§ENST_START_TIME_Q3: u32§reserved27: [u32; 4]§ENST_ON_TIME_Q0: u32§ENST_ON_TIME_Q1: u32§ENST_ON_TIME_Q2: u32§ENST_ON_TIME_Q3: u32§reserved28: [u32; 4]§ENST_OFF_TIME_Q0: u32§ENST_OFF_TIME_Q1: u32§ENST_OFF_TIME_Q2: u32§ENST_OFF_TIME_Q3: u32§ENST_CONTROL: u32§reserved29: [u32; 427]§MMSL_CONTROL: u32§MMSL_STATUS: u32§MMSL_ERR_STATS: u32§MMSL_ASS_OK_COUNT: u32§MMSL_FRAG_COUNT_RX: u32§MMSL_FRAG_COUNT_TX: u32§MMSL_INT_STATUS: u32§MMSL_INT_ENABLE: u32§MMSL_INT_DISABLE: u32§MMSL_INT_MASK: u32§reserved30: [u32; 54]

Trait Implementations§

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impl Clone for MAC_TypeDef

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fn clone(&self) -> MAC_TypeDef

Returns a duplicate of the value. Read more
1.0.0 · Source§

const fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source. Read more
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impl Debug for MAC_TypeDef

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fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter. Read more
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impl Copy for MAC_TypeDef

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impl<T> Any for T
where T: 'static + ?Sized,

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fn type_id(&self) -> TypeId

Gets the TypeId of self. Read more
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impl<T> Borrow<T> for T
where T: ?Sized,

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fn borrow(&self) -> &T

Immutably borrows from an owned value. Read more
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impl<T> BorrowMut<T> for T
where T: ?Sized,

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fn borrow_mut(&mut self) -> &mut T

Mutably borrows from an owned value. Read more
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impl<T> CloneToUninit for T
where T: Clone,

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unsafe fn clone_to_uninit(&self, dest: *mut u8)

🔬This is a nightly-only experimental API. (clone_to_uninit)
Performs copy-assignment from self to dest. Read more
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impl<T> From<T> for T

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fn from(t: T) -> T

Returns the argument unchanged.

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impl<T, U> Into<U> for T
where U: From<T>,

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fn into(self) -> U

Calls U::from(self).

That is, this conversion is whatever the implementation of From<T> for U chooses to do.

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impl<T, U> TryFrom<U> for T
where U: Into<T>,

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type Error = Infallible

The type returned in the event of a conversion error.
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fn try_from(value: U) -> Result<T, <T as TryFrom<U>>::Error>

Performs the conversion.
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impl<T, U> TryInto<U> for T
where U: TryFrom<T>,

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type Error = <U as TryFrom<T>>::Error

The type returned in the event of a conversion error.
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fn try_into(self) -> Result<U, <U as TryFrom<T>>::Error>

Performs the conversion.