Struct AhbSecureCtrl 

pub struct AhbSecureCtrl { /* private fields */ }

LPC_Next0 AHB secure controller

Implementations

impl AhbSecureCtrl

pub const PTR: *const RegisterBlock = {0x40148000 as *const ahb_secure_ctrl::RegisterBlock}

Pointer to the register block

pub const fn ptr() -> *const RegisterBlock

Return the pointer to the register block

pub unsafe fn steal() -> Self

Steal an instance of this peripheral

Safety

Ensure that the new instance of the peripheral cannot be used in a way that may race with any existing instances, for example by only accessing read-only or write-only registers, or by consuming the original peripheral and using critical sections to coordinate access between multiple new instances.

Additionally, other software such as HALs may rely on only one peripheral instance existing to ensure memory safety; ensure no stolen instances are passed to such software.

Methods from Deref<Target = RegisterBlock>

pub fn rom_mem_rule(&self, n: usize) -> &RomMemRule

0x10..0x20 - Memory ROM Rule(n) Register

pub fn rom_mem_rule_iter(&self) -> impl Iterator<Item = &RomMemRule>

Iterator for array of: 0x10..0x20 - Memory ROM Rule(n) Register

pub fn flexspi0_region0_rule(&self, n: usize) -> &Flexspi0Region0Rule

0x30..0x40 - FLEXSPI0 Region 0 Rule(n) Register

pub fn flexspi0_region0_rule_iter( &self, ) -> impl Iterator<Item = &Flexspi0Region0Rule>

Iterator for array of: 0x30..0x40 - FLEXSPI0 Region 0 Rule(n) Register

pub fn flexspi0_region1_rule0(&self) -> &Flexspi0Region1Rule0

0x40 - FLEXSPI0 Region 1 Rule 0 Register

pub fn flexspi0_region2_rule0(&self) -> &Flexspi0Region2Rule0

0x50 - FLEXSPI0 Region 2 Rule 0 Register

pub fn flexspi0_region3_rule0(&self) -> &Flexspi0Region3Rule0

0x60 - FLEXSPI0 Region 3 Rule 0 Register

pub fn flexspi0_region4_rule0(&self) -> &Flexspi0Region4Rule0

0x70 - FLEXSPI0 Region 4 Rule 0 Register

pub fn ram00_rule(&self, n: usize) -> &Ram00Rule

0x90..0xa0 - SRAM Partition 00 Rule(n) Register

pub fn ram00_rule_iter(&self) -> impl Iterator<Item = &Ram00Rule>

Iterator for array of: 0x90..0xa0 - SRAM Partition 00 Rule(n) Register

pub fn ram01_rule(&self, n: usize) -> &Ram01Rule

0xa0..0xb0 - SRAM Partition 01 Rule(n) Register

pub fn ram01_rule_iter(&self) -> impl Iterator<Item = &Ram01Rule>

Iterator for array of: 0xa0..0xb0 - SRAM Partition 01 Rule(n) Register

pub fn ram02_rule(&self, n: usize) -> &Ram02Rule

0xc0..0xd0 - SRAM Partition 02 Rule(n) Register

pub fn ram02_rule_iter(&self) -> impl Iterator<Item = &Ram02Rule>

Iterator for array of: 0xc0..0xd0 - SRAM Partition 02 Rule(n) Register

pub fn ram03_rule(&self, n: usize) -> &Ram03Rule

0xd0..0xe0 - SRAM Partition 03 Rule(n) Register

pub fn ram03_rule_iter(&self) -> impl Iterator<Item = &Ram03Rule>

Iterator for array of: 0xd0..0xe0 - SRAM Partition 03 Rule(n) Register

pub fn ram04_rule(&self, n: usize) -> &Ram04Rule

0xf0..0x100 - SRAM Partition 04 Rule(n) Register

pub fn ram04_rule_iter(&self) -> impl Iterator<Item = &Ram04Rule>

Iterator for array of: 0xf0..0x100 - SRAM Partition 04 Rule(n) Register

pub fn ram05_rule(&self, n: usize) -> &Ram05Rule

0x100..0x110 - SRAM Partition 05 Rule(n) Register

pub fn ram05_rule_iter(&self) -> impl Iterator<Item = &Ram05Rule>

Iterator for array of: 0x100..0x110 - SRAM Partition 05 Rule(n) Register

pub fn ram06_rule(&self, n: usize) -> &Ram06Rule

0x110..0x120 - SRAM Partition 06 Rule(n) Register

pub fn ram06_rule_iter(&self) -> impl Iterator<Item = &Ram06Rule>

Iterator for array of: 0x110..0x120 - SRAM Partition 06 Rule(n) Register

pub fn ram07_rule(&self, n: usize) -> &Ram07Rule

0x120..0x130 - SRAM Partition 07 Rule(n) Register

pub fn ram07_rule_iter(&self) -> impl Iterator<Item = &Ram07Rule>

Iterator for array of: 0x120..0x130 - SRAM Partition 07 Rule(n) Register

pub fn ram08_rule(&self, n: usize) -> &Ram08Rule

0x140..0x150 - SRAM Partition 08 Rule(n) Register

pub fn ram08_rule_iter(&self) -> impl Iterator<Item = &Ram08Rule>

Iterator for array of: 0x140..0x150 - SRAM Partition 08 Rule(n) Register

pub fn ram09_rule(&self, n: usize) -> &Ram09Rule

0x150..0x160 - SRAM Partition 09 Rule(n) Register

pub fn ram09_rule_iter(&self) -> impl Iterator<Item = &Ram09Rule>

Iterator for array of: 0x150..0x160 - SRAM Partition 09 Rule(n) Register

pub fn ram10_rule(&self, n: usize) -> &Ram10Rule

0x160..0x170 - SRAM Partition 10 Rule(n) Register

pub fn ram10_rule_iter(&self) -> impl Iterator<Item = &Ram10Rule>

Iterator for array of: 0x160..0x170 - SRAM Partition 10 Rule(n) Register

pub fn ram11_rule(&self, n: usize) -> &Ram11Rule

0x170..0x180 - SRAM Partition 11 Rule(n) Register

pub fn ram11_rule_iter(&self) -> impl Iterator<Item = &Ram11Rule>

Iterator for array of: 0x170..0x180 - SRAM Partition 11 Rule(n) Register

pub fn ram12_rule(&self, n: usize) -> &Ram12Rule

0x190..0x1a0 - SRAM Partition 12 Rule(n) Register

pub fn ram12_rule_iter(&self) -> impl Iterator<Item = &Ram12Rule>

Iterator for array of: 0x190..0x1a0 - SRAM Partition 12 Rule(n) Register

pub fn ram13_rule(&self, n: usize) -> &Ram13Rule

0x1a0..0x1b0 - SRAM Partition 13 Rule(n) Register

pub fn ram13_rule_iter(&self) -> impl Iterator<Item = &Ram13Rule>

Iterator for array of: 0x1a0..0x1b0 - SRAM Partition 13 Rule(n) Register

pub fn ram14_rule(&self, n: usize) -> &Ram14Rule

0x1b0..0x1c0 - SRAM Partition 14 Rule(n) Register

pub fn ram14_rule_iter(&self) -> impl Iterator<Item = &Ram14Rule>

Iterator for array of: 0x1b0..0x1c0 - SRAM Partition 14 Rule(n) Register

pub fn ram15_rule(&self, n: usize) -> &Ram15Rule

0x1c0..0x1d0 - SRAM Partition 15 Rule(n) Register

pub fn ram15_rule_iter(&self) -> impl Iterator<Item = &Ram15Rule>

Iterator for array of: 0x1c0..0x1d0 - SRAM Partition 15 Rule(n) Register

pub fn ram16_rule(&self, n: usize) -> &Ram16Rule

0x1e0..0x1f0 - SRAM Partition 16 Rule(n) Register

pub fn ram16_rule_iter(&self) -> impl Iterator<Item = &Ram16Rule>

Iterator for array of: 0x1e0..0x1f0 - SRAM Partition 16 Rule(n) Register

pub fn ram17_rule(&self, n: usize) -> &Ram17Rule

0x1f0..0x200 - SRAM Partition 17 Rule(n) Register

pub fn ram17_rule_iter(&self) -> impl Iterator<Item = &Ram17Rule>

Iterator for array of: 0x1f0..0x200 - SRAM Partition 17 Rule(n) Register

pub fn ram18_rule(&self, n: usize) -> &Ram18Rule

0x200..0x210 - SRAM Partition 18 Rule(n) Register

pub fn ram18_rule_iter(&self) -> impl Iterator<Item = &Ram18Rule>

Iterator for array of: 0x200..0x210 - SRAM Partition 18 Rule(n) Register

pub fn ram19_rule(&self, n: usize) -> &Ram19Rule

0x210..0x220 - SRAM Partition 19 Rule(n) Register

pub fn ram19_rule_iter(&self) -> impl Iterator<Item = &Ram19Rule>

Iterator for array of: 0x210..0x220 - SRAM Partition 19 Rule(n) Register

pub fn ram20_rule(&self, n: usize) -> &Ram20Rule

0x230..0x240 - SRAM Partition 20 Rule(n) Register

pub fn ram20_rule_iter(&self) -> impl Iterator<Item = &Ram20Rule>

Iterator for array of: 0x230..0x240 - SRAM Partition 20 Rule(n) Register

pub fn ram21_rule(&self, n: usize) -> &Ram21Rule

0x240..0x250 - SRAM Partition 21 Rule(n) Register

pub fn ram21_rule_iter(&self) -> impl Iterator<Item = &Ram21Rule>

Iterator for array of: 0x240..0x250 - SRAM Partition 21 Rule(n) Register

pub fn ram22_rule(&self, n: usize) -> &Ram22Rule

0x250..0x260 - SRAM Partition 22 Rule(n) Register

pub fn ram22_rule_iter(&self) -> impl Iterator<Item = &Ram22Rule>

Iterator for array of: 0x250..0x260 - SRAM Partition 22 Rule(n) Register

pub fn ram23_rule(&self, n: usize) -> &Ram23Rule

0x260..0x270 - SRAM Partition 23 Rule(n) Register

pub fn ram23_rule_iter(&self) -> impl Iterator<Item = &Ram23Rule>

Iterator for array of: 0x260..0x270 - SRAM Partition 23 Rule(n) Register

pub fn ram24_rule(&self, n: usize) -> &Ram24Rule

0x280..0x290 - SRAM Partition 24 Rule(n) Register

pub fn ram24_rule_iter(&self) -> impl Iterator<Item = &Ram24Rule>

Iterator for array of: 0x280..0x290 - SRAM Partition 24 Rule(n) Register

pub fn ram25_rule(&self, n: usize) -> &Ram25Rule

0x290..0x2a0 - SRAM Partition 25 Rule(n) Register

pub fn ram25_rule_iter(&self) -> impl Iterator<Item = &Ram25Rule>

Iterator for array of: 0x290..0x2a0 - SRAM Partition 25 Rule(n) Register

pub fn ram26_rule(&self, n: usize) -> &Ram26Rule

0x2a0..0x2b0 - SRAM Partition 26 Rule(n) Register

pub fn ram26_rule_iter(&self) -> impl Iterator<Item = &Ram26Rule>

Iterator for array of: 0x2a0..0x2b0 - SRAM Partition 26 Rule(n) Register

pub fn ram27_rule(&self, n: usize) -> &Ram27Rule

0x2b0..0x2c0 - SRAM Partition 27 Rule(n) Register

pub fn ram27_rule_iter(&self) -> impl Iterator<Item = &Ram27Rule>

Iterator for array of: 0x2b0..0x2c0 - SRAM Partition 27 Rule(n) Register

pub fn ram28_rule(&self, n: usize) -> &Ram28Rule

0x2d0..0x2e0 - SRAM Partition 28 Rule(n) Register

pub fn ram28_rule_iter(&self) -> impl Iterator<Item = &Ram28Rule>

Iterator for array of: 0x2d0..0x2e0 - SRAM Partition 28 Rule(n) Register

pub fn ram29_rule(&self, n: usize) -> &Ram29Rule

0x2e0..0x2f0 - SRAM Partition 29 Rule(n) Register

pub fn ram29_rule_iter(&self) -> impl Iterator<Item = &Ram29Rule>

Iterator for array of: 0x2e0..0x2f0 - SRAM Partition 29 Rule(n) Register

pub fn pif_hifi4_x_mem_rule0(&self) -> &PifHifi4XMemRule0

0x320 - Security access rules for HiFi 4 memory sectors (0x24000000–0x240FFFFF). Each sector is 32 Kbytes, there’re 4 sectors in total.

pub fn apb_grp0_mem_rule0(&self) -> &ApbGrp0MemRule0

0x340 - Security access rules for APB Bridge 0 peripherals. Each APB bridge sector is 4 Kbytes, there’re 16 sectors in total.

pub fn apb_grp0_mem_rule1(&self) -> &ApbGrp0MemRule1

0x344 - Security access rules for APB Bridge 0 peripherals. Each APB bridge sector is 4 Kbytes, there’re 16 sectors in total.

pub fn apb_grp1_mem_rule0(&self) -> &ApbGrp1MemRule0

0x350 - Security access rules for APB Bridge 1 peripherals. Each APB bridge sector is 4 Kbytes, there’re 16 sectors in total.

pub fn apb_grp1_mem_rule1(&self) -> &ApbGrp1MemRule1

0x354 - Security access rules for APB Bridge 1 peripherals. Each APB bridge sector is 4 Kbytes, there’re 16 sectors in total.

pub fn apb_grp1_mem_rule2(&self) -> &ApbGrp1MemRule2

0x358 - Security access rules for APB Bridge 1 peripherals. Each APB bridge sector is 4 Kbytes, there’re 16 sectors in total.

pub fn ahb_periph0_slave_rule0(&self) -> &AhbPeriph0SlaveRule0

0x360 - Security access rules for AHB peripheral slaves area 0x40100000–0x4010FFFF

pub fn aips_bridge0_mem_rule0(&self) -> &AipsBridge0MemRule0

0x370 - 0x40110000–0x4011FFFF

pub fn ahb_periph1_slave_rule0(&self) -> &AhbPeriph1SlaveRule0

0x380 - the memory map is 0x40120000–0x40127FFF

pub fn aips_bridge1_mem_rule0(&self) -> &AipsBridge1MemRule0

0x3a0 - Security access rules for AIPS Bridge peripherals. Each AIPS bridge sector is 4 Kbytes, there’re 16 sectors in total.

pub fn aips_bridge1_mem_rule1(&self) -> &AipsBridge1MemRule1

0x3a4 - Security access rules for AIPS Bridge peripherals. Each AIPS bridge sector is 4 Kbytes, there’re 16 sectors in total.

pub fn ahb_periph2_slave_rule0(&self) -> &AhbPeriph2SlaveRule0

0x3b0 - Security access rules for AHB peripheral slaves area 0x40140000–0x4014BFFF

pub fn security_ctrl_mem_rule0(&self) -> &SecurityCtrlMemRule0

0x3c0 - 0x40148000–0x4014BFFF

pub fn ahb_periph3_slave_rule0(&self) -> &AhbPeriph3SlaveRule0

0x3d0 - Security access rules for AHB peripheral slaves area 0x40150000–0x40158FFF

pub fn sec_vio_addr(&self, n: usize) -> &SecVioAddr

0xe00..0xe48 - most recent security violation address for AHB layer n

pub fn sec_vio_addr_iter(&self) -> impl Iterator<Item = &SecVioAddr>

Iterator for array of: 0xe00..0xe48 - most recent security violation address for AHB layer n

pub fn sec_vio_misc_info(&self, n: usize) -> &SecVioMiscInfo

0xe80..0xec8 - most recent security violation miscellaneous information for AHB layer n

pub fn sec_vio_misc_info_iter(&self) -> impl Iterator<Item = &SecVioMiscInfo>

Iterator for array of: 0xe80..0xec8 - most recent security violation miscellaneous information for AHB layer n

pub fn sec_vio_info_valid(&self) -> &SecVioInfoValid

0xf00 - security violation address/information registers valid flags

pub fn sec_gpio_mask0(&self) -> &SecGpioMask0

0xf80 - Secure GPIO mask for port 0 pins. This register is used to block leakage of Secure interface (GPIOs, I2C, UART configured as secure peripherals) pin states to non-secure world.

pub fn sec_gpio_mask1(&self) -> &SecGpioMask1

0xf84 - Secure GPIO mask for port 1 pins.

pub fn sec_gpio_mask2(&self) -> &SecGpioMask2

0xf88 - Secure GPIO mask for port 2 pins.

pub fn sec_gpio_mask3(&self) -> &SecGpioMask3

0xf8c - Secure GPIO mask for port 3 pins.

pub fn sec_gpio_mask4(&self) -> &SecGpioMask4

0xf90 - Secure GPIO mask for port 4 pins.

pub fn sec_gpio_mask5(&self) -> &SecGpioMask5

0xf94 - Secure GPIO mask for port 5 pins.

pub fn sec_gpio_mask6(&self) -> &SecGpioMask6

0xf98 - Secure GPIO mask for port 6 pins.

pub fn sec_gpio_mask7(&self) -> &SecGpioMask7

0xf9c - Secure GPIO mask for port 7 pins.

pub fn sec_dsp_int_mask(&self) -> &SecDspIntMask

0xfa0 - secure general purpose register 8 used to mask interrupts to DSP for security purpose

pub fn sec_mask_lock(&self) -> &SecMaskLock

0xfbc - sec_gp_reg write-lock bits

pub fn master_sec_level(&self) -> &MasterSecLevel

0xfd0 - master secure level register

pub fn master_sec_level_anti_pol(&self) -> &MasterSecLevelAntiPol

0xfd4 - master secure level anti-pole register

pub fn cm33_lock_reg(&self) -> &Cm33LockReg

0xfec - m33 lock control register

pub fn misc_ctrl_dp_reg(&self) -> &MiscCtrlDpReg

0xff8 - secure control duplicate register

pub fn misc_ctrl_reg(&self) -> &MiscCtrlReg

0xffc - secure control register

Trait Implementations

impl Debug for AhbSecureCtrl

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl Deref for AhbSecureCtrl

type Target = RegisterBlock

The resulting type after dereferencing.

fn deref(&self) -> &Self::Target

Dereferences the value.

impl Send for AhbSecureCtrl