Struct RegisterBlock 

pub struct RegisterBlock { /* private fields */ }

Register block

Implementations

impl RegisterBlock

pub const fn addr(&self) -> &Addr

0x00 - Flash Write Address.

pub const fn clkdiv(&self) -> &Clkdiv

0x04 - Flash Clock Divide. The clock (PLL0) is divided by this value to generate a 1 MHz clock for Flash controller.

pub const fn ctrl(&self) -> &Ctrl

0x08 - Flash Control Register.

pub const fn intr(&self) -> &Intr

0x24 - Flash Interrupt Register.

pub const fn eccdata(&self) -> &Eccdata

0x28 - ECC Data Register.

pub const fn data(&self, n: usize) -> &Data

0x30..0x40 - Flash Write Data.

pub fn data_iter(&self) -> impl Iterator<Item = &Data>

Iterator for array of: 0x30..0x40 - Flash Write Data.

pub const fn actrl(&self) -> &Actrl

0x40 - Access Control Register. Writing the ACTRL register with the following values in the order shown, allows read and write access to the system and user Information block: pflc-actrl = 0x3a7f5ca3; pflc-actrl = 0xa1e34f20; pflc-actrl = 0x9608b2c1. When unlocked, a write of any word will disable access to system and user information block. Readback of this register is always zero.

pub const fn welr0(&self) -> &Welr0

0x80 - WELR0

pub const fn welr1(&self) -> &Welr1

0x88 - WELR1

pub const fn rlr0(&self) -> &Rlr0

0x90 - RLR0

pub const fn rlr1(&self) -> &Rlr1

0x98 - RLR1