pub struct SRC_SPEC;Expand description
Source Device Address. If SRCINC=1, the counter bits are incremented by 1,2, or 4, depending on the data width of each AHB cycle. For peripheral transfers, some or all of the actual address bits are fixed. If SRCINC=0, this register remains constant. In the case where a count-to-zero condition occurs while RLDEN=1, the register is reloaded with the contents of DMA_SRC_RLD.
This register you can read, write_with_zero, reset, write, modify. See API.
For information about available fields see src module
Trait Implementations§
Source§impl Resettable for SRC_SPEC
reset() method sets SRC to value 0
impl Resettable for SRC_SPEC
reset() method sets SRC to value 0
Source§fn reset_value() -> Self::Ux
fn reset_value() -> Self::Ux
Reset value of the register.
Auto Trait Implementations§
impl Freeze for SRC_SPEC
impl RefUnwindSafe for SRC_SPEC
impl Send for SRC_SPEC
impl Sync for SRC_SPEC
impl Unpin for SRC_SPEC
impl UnwindSafe for SRC_SPEC
Blanket Implementations§
Source§impl<T> BorrowMut<T> for Twhere
T: ?Sized,
impl<T> BorrowMut<T> for Twhere
T: ?Sized,
Source§fn borrow_mut(&mut self) -> &mut T
fn borrow_mut(&mut self) -> &mut T
Mutably borrows from an owned value. Read more