pub struct R(_);
Register CTL reader
CTL
Bit 1 - Break Enable.
Bit 2 - Enable address detect mode.
Bit 6 - Transmit Disable.
Bit 8 - Continuous Clock generation. By default, SCLK is only output while data is being transmitted in synchronous mode.
Bit 9 - Clear Continuous Clock.
Reads raw bits from register.
TypeId
self
Returns the argument unchanged.
Calls U::from(self).
U::from(self)
That is, this conversion is whatever the implementation of From<T> for U chooses to do.
From<T> for U