Module lpc55_pac::syscon::sdioclkctrl [−][src]
SDIO CCLKIN phase and delay control
Structs
CCLK_DRV_DELAY_ACTIVE_R | Field |
CCLK_DRV_DELAY_ACTIVE_W | Field |
CCLK_DRV_DELAY_R | Field |
CCLK_DRV_DELAY_W | Field |
CCLK_DRV_PHASE_R | Field |
CCLK_DRV_PHASE_W | Field |
CCLK_SAMPLE_DELAY_ACTIVE_R | Field |
CCLK_SAMPLE_DELAY_ACTIVE_W | Field |
CCLK_SAMPLE_DELAY_R | Field |
CCLK_SAMPLE_DELAY_W | Field |
CCLK_SAMPLE_PHASE_R | Field |
CCLK_SAMPLE_PHASE_W | Field |
PHASE_ACTIVE_R | Field |
PHASE_ACTIVE_W | Field |
R | Register |
SDIOCLKCTRL_SPEC | SDIO CCLKIN phase and delay control |
W | Register |
Enums
CCLK_DRV_DELAY_ACTIVE_A | Enables drive delay, as controlled by the CCLK_DRV_DELAY field. |
CCLK_DRV_PHASE_A | Programmable delay value by which cclk_in_drv is phase-shifted with regard to cclk_in. |
CCLK_SAMPLE_DELAY_ACTIVE_A | Enables sample delay, as controlled by the CCLK_SAMPLE_DELAY field. |
CCLK_SAMPLE_PHASE_A | Programmable delay value by which cclk_in_sample is delayed with regard to cclk_in. |
PHASE_ACTIVE_A | Enables the delays CCLK_DRV_PHASE and CCLK_SAMPLE_PHASE. |