Module lpc55_pac::ahb_secure_ctrl::sec_cpu_int_mask1 [−][src]
Secure Interrupt mask for CPU1
Structs
CASPER_IRQ_R | Field |
CASPER_IRQ_W | Field |
CTIMER2_IRQ_R | Field |
CTIMER2_IRQ_W | Field |
CTIMER4_IRQ_R | Field |
CTIMER4_IRQ_W | Field |
GPIO_INT0_IRQ4_R | Field |
GPIO_INT0_IRQ4_W | Field |
GPIO_INT0_IRQ5_R | Field |
GPIO_INT0_IRQ5_W | Field |
GPIO_INT0_IRQ6_R | Field |
GPIO_INT0_IRQ6_W | Field |
GPIO_INT0_IRQ7_R | Field |
GPIO_INT0_IRQ7_W | Field |
LSPI_HS_IRQ_R | Field |
LSPI_HS_IRQ_W | Field |
OS_EVENT_TIMER_IRQ_R | Field |
OS_EVENT_TIMER_IRQ_W | Field |
PLU_IRQ_R | Field |
PLU_IRQ_W | Field |
PQ_IRQ_R | Field |
PQ_IRQ_W | Field |
PUFKEY_IRQ_R | Field |
PUFKEY_IRQ_W | Field |
R | Register |
RESERVED0_R | Field |
RESERVED0_W | Field |
RESERVED1_R | Field |
RESERVED1_W | Field |
RESERVED2_R | Field |
RESERVED2_W | Field |
RESERVED3_R | Field |
RESERVED3_W | Field |
RESERVED4_R | Field |
RESERVED4_W | Field |
RESERVED5_R | Field |
RESERVED5_W | Field |
SDIO_IRQ_R | Field |
SDIO_IRQ_W | Field |
SDMA1_IRQ_R | Field |
SDMA1_IRQ_W | Field |
SEC_CPU_INT_MASK1_SPEC | Secure Interrupt mask for CPU1 |
SEC_GPIO_INT0_IRQ0_R | Field |
SEC_GPIO_INT0_IRQ0_W | Field |
SEC_GPIO_INT0_IRQ1_R | Field |
SEC_GPIO_INT0_IRQ1_W | Field |
SEC_HYPERVISOR_CALL_IRQ_R | Field |
SEC_HYPERVISOR_CALL_IRQ_W | Field |
SEC_VIO_IRQ_R | Field |
SEC_VIO_IRQ_W | Field |
SHA_IRQ_R | Field |
SHA_IRQ_W | Field |
USB1_IRQ_R | Field |
USB1_IRQ_W | Field |
USB1_NEEDCLK_R | Field |
USB1_NEEDCLK_W | Field |
USB1_PHY_IRQ_R | Field |
USB1_PHY_IRQ_W | Field |
W | Register |
Enums
CASPER_IRQ_A | CASPER interrupt. |
CTIMER2_IRQ_A | Standard counter/timer 2 interrupt. |
CTIMER4_IRQ_A | Standard counter/timer 4 interrupt. |
GPIO_INT0_IRQ4_A | Pin interrupt 4 or pattern match engine slice 4 interrupt. |
GPIO_INT0_IRQ5_A | Pin interrupt 5 or pattern match engine slice 5 interrupt. |
GPIO_INT0_IRQ6_A | Pin interrupt 6 or pattern match engine slice 6 interrupt. |
GPIO_INT0_IRQ7_A | Pin interrupt 7 or pattern match engine slice 7 interrupt. |
LSPI_HS_IRQ_A | High Speed SPI interrupt |
OS_EVENT_TIMER_IRQ_A | OS Event Timer and OS Event Timer Wakeup interrupts |
PLU_IRQ_A | Programmable Look-Up Controller interrupt. |
PQ_IRQ_A | Power Quad interrupt. |
PUFKEY_IRQ_A | PUF interrupt. |
RESERVED0_A | Reserved. Read value is undefined, only zero should be written. |
RESERVED1_A | Reserved. Read value is undefined, only zero should be written. |
RESERVED2_A | Reserved. Read value is undefined, only zero should be written. |
RESERVED3_A | Reserved. Read value is undefined, only zero should be written. |
RESERVED4_A | Reserved. Read value is undefined, only zero should be written. |
RESERVED5_A | Reserved. Read value is undefined, only zero should be written. |
SDIO_IRQ_A | SDIO Controller interrupt. |
SDMA1_IRQ_A | System DMA 1 (Secure) interrupt |
SEC_GPIO_INT0_IRQ0_A | Secure Pin interrupt 0 or pattern match engine slice 0 interrupt. |
SEC_GPIO_INT0_IRQ1_A | Secure Pin interrupt 1 or pattern match engine slice 1 interrupt. |
SEC_HYPERVISOR_CALL_IRQ_A | Secure fault Hyper Visor call interrupt. |
SEC_VIO_IRQ_A | Security Violation interrupt. |
SHA_IRQ_A | HASH-AES interrupt. |
USB1_IRQ_A | USB High Speed Controller interrupt. |
USB1_NEEDCLK_A | USB High Speed Controller Clock request interrupt. |
USB1_PHY_IRQ_A | USB High Speed PHY Controller interrupt. |