Struct lpc55_pac::ahb_secure_ctrl::sec_cpu_int_mask1::GPIO_INT0_IRQ5_W [−][src]
pub struct GPIO_INT0_IRQ5_W<'a> { /* fields omitted */ }
Field GPIO_INT0_IRQ5
writer - Pin interrupt 5 or pattern match engine slice 5 interrupt.
Implementations
impl<'a> GPIO_INT0_IRQ5_W<'a>
[src]
impl<'a> GPIO_INT0_IRQ5_W<'a>
[src]pub fn variant(self, variant: GPIO_INT0_IRQ5_A) -> &'a mut W
[src]
Writes variant
to the field
pub fn invisible(self) -> &'a mut W
[src]
no description available
pub fn visible(self) -> &'a mut W
[src]
no description available
pub fn set_bit(self) -> &'a mut W
[src]
Sets the field bit
pub fn clear_bit(self) -> &'a mut W
[src]
Clears the field bit
pub fn bit(self, value: bool) -> &'a mut W
[src]
Writes raw bits to the field
Auto Trait Implementations
impl<'a> Send for GPIO_INT0_IRQ5_W<'a>
impl<'a> Send for GPIO_INT0_IRQ5_W<'a>
impl<'a> Sync for GPIO_INT0_IRQ5_W<'a>
impl<'a> Sync for GPIO_INT0_IRQ5_W<'a>
impl<'a> Unpin for GPIO_INT0_IRQ5_W<'a>
impl<'a> Unpin for GPIO_INT0_IRQ5_W<'a>