Struct lpc55_pac::ahb_secure_ctrl::sec_cpu_int_mask1::R

pub struct R(_);

Register SEC_CPU_INT_MASK1 reader

Implementations

impl R

pub fn gpio_int0_irq4(&self) -> GPIO_INT0_IRQ4_R

Bit 0 - Pin interrupt 4 or pattern match engine slice 4 interrupt.

pub fn gpio_int0_irq5(&self) -> GPIO_INT0_IRQ5_R

Bit 1 - Pin interrupt 5 or pattern match engine slice 5 interrupt.

pub fn gpio_int0_irq6(&self) -> GPIO_INT0_IRQ6_R

Bit 2 - Pin interrupt 6 or pattern match engine slice 6 interrupt.

pub fn gpio_int0_irq7(&self) -> GPIO_INT0_IRQ7_R

Bit 3 - Pin interrupt 7 or pattern match engine slice 7 interrupt.

pub fn ctimer2_irq(&self) -> CTIMER2_IRQ_R

Bit 4 - Standard counter/timer 2 interrupt.

pub fn ctimer4_irq(&self) -> CTIMER4_IRQ_R

Bit 5 - Standard counter/timer 4 interrupt.

pub fn os_event_timer_irq(&self) -> OS_EVENT_TIMER_IRQ_R

Bit 6 - OS Event Timer and OS Event Timer Wakeup interrupts

pub fn reserved0(&self) -> RESERVED0_R

Bit 7 - Reserved. Read value is undefined, only zero should be written.

pub fn reserved1(&self) -> RESERVED1_R

Bit 8 - Reserved. Read value is undefined, only zero should be written.

pub fn reserved2(&self) -> RESERVED2_R

Bit 9 - Reserved. Read value is undefined, only zero should be written.

pub fn sdio_irq(&self) -> SDIO_IRQ_R

Bit 10 - SDIO Controller interrupt.

pub fn reserved3(&self) -> RESERVED3_R

Bit 11 - Reserved. Read value is undefined, only zero should be written.

pub fn reserved4(&self) -> RESERVED4_R

Bit 12 - Reserved. Read value is undefined, only zero should be written.

pub fn reserved5(&self) -> RESERVED5_R

Bit 13 - Reserved. Read value is undefined, only zero should be written.

pub fn usb1_phy_irq(&self) -> USB1_PHY_IRQ_R

Bit 14 - USB High Speed PHY Controller interrupt.

pub fn usb1_irq(&self) -> USB1_IRQ_R

Bit 15 - USB High Speed Controller interrupt.

pub fn usb1_needclk(&self) -> USB1_NEEDCLK_R

Bit 16 - USB High Speed Controller Clock request interrupt.

pub fn sec_hypervisor_call_irq(&self) -> SEC_HYPERVISOR_CALL_IRQ_R

Bit 17 - Secure fault Hyper Visor call interrupt.

pub fn sec_gpio_int0_irq0(&self) -> SEC_GPIO_INT0_IRQ0_R

Bit 18 - Secure Pin interrupt 0 or pattern match engine slice 0 interrupt.

pub fn sec_gpio_int0_irq1(&self) -> SEC_GPIO_INT0_IRQ1_R

Bit 19 - Secure Pin interrupt 1 or pattern match engine slice 1 interrupt.

pub fn plu_irq(&self) -> PLU_IRQ_R

Bit 20 - Programmable Look-Up Controller interrupt.

pub fn sec_vio_irq(&self) -> SEC_VIO_IRQ_R

Bit 21 - Security Violation interrupt.

pub fn sha_irq(&self) -> SHA_IRQ_R

Bit 22 - HASH-AES interrupt.

pub fn casper_irq(&self) -> CASPER_IRQ_R

Bit 23 - CASPER interrupt.

pub fn pufkey_irq(&self) -> PUFKEY_IRQ_R

Bit 24 - PUF interrupt.

pub fn pq_irq(&self) -> PQ_IRQ_R

Bit 25 - Power Quad interrupt.

pub fn sdma1_irq(&self) -> SDMA1_IRQ_R

Bit 26 - System DMA 1 (Secure) interrupt

pub fn lspi_hs_irq(&self) -> LSPI_HS_IRQ_R

Bit 27 - High Speed SPI interrupt

Methods from Deref<Target = R<SEC_CPU_INT_MASK1_SPEC>>

pub fn bits(&self) -> REG::Ux

Reads raw bits from register.

Trait Implementations

impl Deref for R

type Target = R<SEC_CPU_INT_MASK1_SPEC>

The resulting type after dereferencing.

fn deref(&self) -> &Self::Target

Dereferences the value.

impl From<R<SEC_CPU_INT_MASK1_SPEC>> for R

fn from(reader: R<SEC_CPU_INT_MASK1_SPEC>) -> Self

Performs the conversion.