Enum lpc55_pac::ahb_secure_ctrl::sec_cpu_int_mask1::SEC_GPIO_INT0_IRQ1_A

pub enum SEC_GPIO_INT0_IRQ1_A {
    INVISIBLE,
    VISIBLE,
}

Secure Pin interrupt 1 or pattern match engine slice 1 interrupt.

Value on reset: 1

Variants

INVISIBLE

0: no description available

VISIBLE

1: no description available

Trait Implementations

impl Clone for SEC_GPIO_INT0_IRQ1_A

fn clone(&self) -> SEC_GPIO_INT0_IRQ1_A

Returns a copy of the value.

pub fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Copy for SEC_GPIO_INT0_IRQ1_A

impl Debug for SEC_GPIO_INT0_IRQ1_A

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl PartialEq<SEC_GPIO_INT0_IRQ1_A> for SEC_GPIO_INT0_IRQ1_A

fn eq(&self, other: &SEC_GPIO_INT0_IRQ1_A) -> bool

This method tests for self and other values to be equal, and is used by ==.

#[must_use]

pub fn ne(&self, other: &Rhs) -> bool

This method tests for !=.

impl StructuralPartialEq for SEC_GPIO_INT0_IRQ1_A