[−][src]Type Definition lpc55_pac::anactrl::ringo0_ctrl::R
type R = R<u32, RINGO0_CTRL>;
Reader of register RINGO0_CTRL
Implementations
impl R
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pub fn sl(&self) -> SL_R
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Bit 0 - Select short or long ringo (for all ringos types).
pub fn fs(&self) -> FS_R
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Bit 1 - Ringo frequency output divider.
pub fn swn_swp(&self) -> SWN_SWP_R
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Bits 2:3 - PN-Ringos (P-Transistor and N-Transistor processing) control.
pub fn pd(&self) -> PD_R
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Bit 4 - Ringo module Power control.
pub fn e_nd0(&self) -> E_ND0_R
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Bit 5 - First NAND2-based ringo control.
pub fn e_nd1(&self) -> E_ND1_R
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Bit 6 - Second NAND2-based ringo control.
pub fn e_nr0(&self) -> E_NR0_R
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Bit 7 - First NOR2-based ringo control.
pub fn e_nr1(&self) -> E_NR1_R
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Bit 8 - Second NOR2-based ringo control.
pub fn e_iv0(&self) -> E_IV0_R
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Bit 9 - First Inverter-based ringo control.
pub fn e_iv1(&self) -> E_IV1_R
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Bit 10 - Second Inverter-based ringo control.
pub fn e_pn0(&self) -> E_PN0_R
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Bit 11 - First PN (P-Transistor and N-Transistor processing) monitor control.
pub fn e_pn1(&self) -> E_PN1_R
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Bit 12 - Second PN (P-Transistor and N-Transistor processing) monitor control.
pub fn divisor(&self) -> DIVISOR_R
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Bits 16:19 - Ringo out Clock divider value. Frequency Output = Frequency input / (DIViSOR+1). (minimum = Frequency input / 16)
pub fn div_update_req(&self) -> DIV_UPDATE_REQ_R
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Bit 31 - Ringo clock out Divider status flag. Set when a change is made to the divider value, cleared when the change is complete.