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RegisterBlock

lpc54606_pac::syscon

Struct RegisterBlock 

Source 
pub struct RegisterBlock {
Show 101 fields
    pub ahbmatprio: AHBMATPRIO,
    pub systckcal: SYSTCKCAL,
    pub nmisrc: NMISRC,
    pub asyncapbctrl: ASYNCAPBCTRL,
    pub pioporcap: [PIOPORCAP; 2],
    pub piorescap: [PIORESCAP; 2],
    pub presetctrl0: PRESETCTRL0,
    pub presetctrl1: PRESETCTRL1,
    pub presetctrl2: PRESETCTRL2,
    pub presetctrlset: [PRESETCTRLSET; 3],
    pub presetctrlclr: [PRESETCTRLCLR; 3],
    pub sysrststat: SYSRSTSTAT,
    pub ahbclkctrl0: AHBCLKCTRL0,
    pub ahbclkctrl1: AHBCLKCTRL1,
    pub ahbclkctrl2: AHBCLKCTRL2,
    pub ahbclkctrlset: [AHBCLKCTRLSET; 3],
    pub ahbclkctrlclr: [AHBCLKCTRLCLR; 3],
    pub mainclksela: MAINCLKSELA,
    pub mainclkselb: MAINCLKSELB,
    pub clkoutsela: CLKOUTSELA,
    pub syspllclksel: SYSPLLCLKSEL,
    pub audpllclksel: AUDPLLCLKSEL,
    pub spificlksel: SPIFICLKSEL,
    pub adcclksel: ADCCLKSEL,
    pub usb0clksel: USB0CLKSEL,
    pub usb1clksel: USB1CLKSEL,
    pub fclksel: [FCLKSEL; 10],
    pub mclkclksel: MCLKCLKSEL,
    pub frgclksel: FRGCLKSEL,
    pub dmicclksel: DMICCLKSEL,
    pub sctclksel: SCTCLKSEL,
    pub lcdclksel: LCDCLKSEL,
    pub sdioclksel: SDIOCLKSEL,
    pub systickclkdiv: SYSTICKCLKDIV,
    pub armtraceclkdiv: ARMTRACECLKDIV,
    pub can0clkdiv: CAN0CLKDIV,
    pub can1clkdiv: CAN1CLKDIV,
    pub sc0clkdiv: SC0CLKDIV,
    pub sc1clkdiv: SC1CLKDIV,
    pub ahbclkdiv: AHBCLKDIV,
    pub clkoutdiv: CLKOUTDIV,
    pub frohfclkdiv: FROHFCLKDIV,
    pub spificlkdiv: SPIFICLKDIV,
    pub adcclkdiv: ADCCLKDIV,
    pub usb0clkdiv: USB0CLKDIV,
    pub usb1clkdiv: USB1CLKDIV,
    pub frgctrl: FRGCTRL,
    pub dmicclkdiv: DMICCLKDIV,
    pub mclkdiv: MCLKDIV,
    pub lcdclkdiv: LCDCLKDIV,
    pub sctclkdiv: SCTCLKDIV,
    pub emcclkdiv: EMCCLKDIV,
    pub sdioclkdiv: SDIOCLKDIV,
    pub flashcfg: FLASHCFG,
    pub usb0clkctrl: USB0CLKCTRL,
    pub usb0clkstat: USB0CLKSTAT,
    pub freqmectrl: FREQMECTRL,
    pub mclkio: MCLKIO,
    pub usb1clkctrl: USB1CLKCTRL,
    pub usb1clkstat: USB1CLKSTAT,
    pub emcsysctrl: EMCSYSCTRL,
    pub emcdlyctrl: EMCDLYCTRL,
    pub emcdlycal: EMCDLYCAL,
    pub ethphysel: ETHPHYSEL,
    pub ethsbdctrl: ETHSBDCTRL,
    pub sdioclkctrl: SDIOCLKCTRL,
    pub froctrl: FROCTRL,
    pub sysoscctrl: SYSOSCCTRL,
    pub wdtoscctrl: WDTOSCCTRL,
    pub rtcoscctrl: RTCOSCCTRL,
    pub usbpllctrl: USBPLLCTRL,
    pub usbpllstat: USBPLLSTAT,
    pub syspllctrl: SYSPLLCTRL,
    pub syspllstat: SYSPLLSTAT,
    pub syspllndec: SYSPLLNDEC,
    pub syspllpdec: SYSPLLPDEC,
    pub syspllmdec: SYSPLLMDEC,
    pub audpllctrl: AUDPLLCTRL,
    pub audpllstat: AUDPLLSTAT,
    pub audpllndec: AUDPLLNDEC,
    pub audpllpdec: AUDPLLPDEC,
    pub audpllmdec: AUDPLLMDEC,
    pub audpllfrac: AUDPLLFRAC,
    pub pdsleepcfg0: PDSLEEPCFG0,
    pub pdsleepcfg1: PDSLEEPCFG1,
    pub pdruncfg0: PDRUNCFG0,
    pub pdruncfg1: PDRUNCFG1,
    pub pdruncfgset0: PDRUNCFGSET0,
    pub pdruncfgset1: PDRUNCFGSET1,
    pub pdruncfgclr0: PDRUNCFGCLR0,
    pub pdruncfgclr1: PDRUNCFGCLR1,
    pub starter0: STARTER0,
    pub starter1: STARTER1,
    pub starterset: [STARTERSET; 2],
    pub starterclr: [STARTERCLR; 2],
    pub hwwake: HWWAKE,
    pub autocgor: AUTOCGOR,
    pub jtagidcode: JTAGIDCODE,
    pub device_id0: DEVICE_ID0,
    pub device_id1: DEVICE_ID1,
    pub bodctrl: BODCTRL,
    /* private fields */

}
Expand description

Register block

Fields§

§ahbmatprio: AHBMATPRIO

0x10 - AHB multilayer matrix priority control

§systckcal: SYSTCKCAL

0x40 - System tick counter calibration

§nmisrc: NMISRC

0x48 - NMI Source Select

§asyncapbctrl: ASYNCAPBCTRL

0x4c - Asynchronous APB Control

§pioporcap: [PIOPORCAP; 2]

0xc0 - POR captured value of port n

§piorescap: [PIORESCAP; 2]

0xd0 - Reset captured value of port n

§presetctrl0: PRESETCTRL0

0x100 - Peripheral reset control n

§presetctrl1: PRESETCTRL1

0x104 - Peripheral reset control n

§presetctrl2: PRESETCTRL2

0x108 - Peripheral reset control n

§presetctrlset: [PRESETCTRLSET; 3]

0x120 - Set bits in PRESETCTRLn

§presetctrlclr: [PRESETCTRLCLR; 3]

0x140 - Clear bits in PRESETCTRLn

§sysrststat: SYSRSTSTAT

0x1f0 - System reset status register

§ahbclkctrl0: AHBCLKCTRL0

0x200 - AHB Clock control n

§ahbclkctrl1: AHBCLKCTRL1

0x204 - AHB Clock control n

§ahbclkctrl2: AHBCLKCTRL2

0x208 - AHB Clock control n

§ahbclkctrlset: [AHBCLKCTRLSET; 3]

0x220 - Set bits in AHBCLKCTRLn

§ahbclkctrlclr: [AHBCLKCTRLCLR; 3]

0x240 - Clear bits in AHBCLKCTRLn

§mainclksela: MAINCLKSELA

0x280 - Main clock source select A

§mainclkselb: MAINCLKSELB

0x284 - Main clock source select B

§clkoutsela: CLKOUTSELA

0x288 - CLKOUT clock source select A

§syspllclksel: SYSPLLCLKSEL

0x290 - PLL clock source select

§audpllclksel: AUDPLLCLKSEL

0x298 - Audio PLL clock source select

§spificlksel: SPIFICLKSEL

0x2a0 - SPIFI clock source select

§adcclksel: ADCCLKSEL

0x2a4 - ADC clock source select

§usb0clksel: USB0CLKSEL

0x2a8 - USB0 clock source select

§usb1clksel: USB1CLKSEL

0x2ac - USB1 clock source select

§fclksel: [FCLKSEL; 10]

0x2b0 - Flexcomm 0 clock source select

§mclkclksel: MCLKCLKSEL

0x2e0 - MCLK clock source select

§frgclksel: FRGCLKSEL

0x2e8 - Fractional Rate Generator clock source select

§dmicclksel: DMICCLKSEL

0x2ec - Digital microphone (DMIC) subsystem clock select

§sctclksel: SCTCLKSEL

0x2f0 - SCTimer/PWM clock source select

§lcdclksel: LCDCLKSEL

0x2f4 - LCD clock source select

§sdioclksel: SDIOCLKSEL

0x2f8 - SDIO clock source select

§systickclkdiv: SYSTICKCLKDIV

0x300 - SYSTICK clock divider

§armtraceclkdiv: ARMTRACECLKDIV

0x304 - ARM Trace clock divider

§can0clkdiv: CAN0CLKDIV

0x308 - MCAN0 clock divider

§can1clkdiv: CAN1CLKDIV

0x30c - MCAN1 clock divider

§sc0clkdiv: SC0CLKDIV

0x310 - Smartcard0 clock divider

§sc1clkdiv: SC1CLKDIV

0x314 - Smartcard1 clock divider

§ahbclkdiv: AHBCLKDIV

0x380 - AHB clock divider

§clkoutdiv: CLKOUTDIV

0x384 - CLKOUT clock divider

§frohfclkdiv: FROHFCLKDIV

0x388 - FROHF clock divider

§spificlkdiv: SPIFICLKDIV

0x390 - SPIFI clock divider

§adcclkdiv: ADCCLKDIV

0x394 - ADC clock divider

§usb0clkdiv: USB0CLKDIV

0x398 - USB0 clock divider

§usb1clkdiv: USB1CLKDIV

0x39c - USB1 clock divider

§frgctrl: FRGCTRL

0x3a0 - Fractional rate divider

§dmicclkdiv: DMICCLKDIV

0x3a8 - DMIC clock divider

§mclkdiv: MCLKDIV

0x3ac - I2S MCLK clock divider

§lcdclkdiv: LCDCLKDIV

0x3b0 - LCD clock divider

§sctclkdiv: SCTCLKDIV

0x3b4 - SCT/PWM clock divider

§emcclkdiv: EMCCLKDIV

0x3b8 - EMC clock divider

§sdioclkdiv: SDIOCLKDIV

0x3bc - SDIO clock divider

§flashcfg: FLASHCFG

0x400 - Flash wait states configuration

§usb0clkctrl: USB0CLKCTRL

0x40c - USB0 clock control

§usb0clkstat: USB0CLKSTAT

0x410 - USB0 clock status

§freqmectrl: FREQMECTRL

0x418 - Frequency measure register

§mclkio: MCLKIO

0x420 - MCLK input/output control

§usb1clkctrl: USB1CLKCTRL

0x424 - USB1 clock control

§usb1clkstat: USB1CLKSTAT

0x428 - USB1 clock status

§emcsysctrl: EMCSYSCTRL

0x444 - EMC system control

§emcdlyctrl: EMCDLYCTRL

0x448 - EMC clock delay control

§emcdlycal: EMCDLYCAL

0x44c - EMC delay chain calibration control

§ethphysel: ETHPHYSEL

0x450 - Ethernet PHY Selection

§ethsbdctrl: ETHSBDCTRL

0x454 - Ethernet SBD flow control

§sdioclkctrl: SDIOCLKCTRL

0x460 - SDIO CCLKIN phase and delay control

§froctrl: FROCTRL

0x500 - FRO oscillator control

§sysoscctrl: SYSOSCCTRL

0x504 - System oscillator control

§wdtoscctrl: WDTOSCCTRL

0x508 - Watchdog oscillator control

§rtcoscctrl: RTCOSCCTRL

0x50c - RTC oscillator 32 kHz output control

§usbpllctrl: USBPLLCTRL

0x51c - USB PLL control

§usbpllstat: USBPLLSTAT

0x520 - USB PLL status

§syspllctrl: SYSPLLCTRL

0x580 - System PLL control

§syspllstat: SYSPLLSTAT

0x584 - PLL status

§syspllndec: SYSPLLNDEC

0x588 - PLL N divider

§syspllpdec: SYSPLLPDEC

0x58c - PLL P divider

§syspllmdec: SYSPLLMDEC

0x590 - System PLL M divider

§audpllctrl: AUDPLLCTRL

0x5a0 - Audio PLL control

§audpllstat: AUDPLLSTAT

0x5a4 - Audio PLL status

§audpllndec: AUDPLLNDEC

0x5a8 - Audio PLL N divider

§audpllpdec: AUDPLLPDEC

0x5ac - Audio PLL P divider

§audpllmdec: AUDPLLMDEC

0x5b0 - Audio PLL M divider

§audpllfrac: AUDPLLFRAC

0x5b4 - Audio PLL fractional divider control

§pdsleepcfg0: PDSLEEPCFG0

0x600 - Sleep configuration register

§pdsleepcfg1: PDSLEEPCFG1

0x604 - Sleep configuration register

§pdruncfg0: PDRUNCFG0

0x610 - Power configuration register

§pdruncfg1: PDRUNCFG1

0x614 - Power configuration register

§pdruncfgset0: PDRUNCFGSET0

0x620 - Power configuration set register

§pdruncfgset1: PDRUNCFGSET1

0x624 - Power configuration set register

§pdruncfgclr0: PDRUNCFGCLR0

0x630 - Power configuration clear register

§pdruncfgclr1: PDRUNCFGCLR1

0x634 - Power configuration clear register

§starter0: STARTER0

0x680 - Start logic 0 wake-up enable register

§starter1: STARTER1

0x684 - Start logic 0 wake-up enable register

§starterset: [STARTERSET; 2]

0x6a0 - Set bits in STARTER

§starterclr: [STARTERCLR; 2]

0x6c0 - Clear bits in STARTER0

§hwwake: HWWAKE

0x780 - Configures special cases of hardware wake-up

§autocgor: AUTOCGOR

0xe04 - Auto Clock-Gate Override Register

§jtagidcode: JTAGIDCODE

0xff4 - JTAG ID code register

§device_id0: DEVICE_ID0

0xff8 - Part ID register

§device_id1: DEVICE_ID1

0xffc - Boot ROM and die revision register

§bodctrl: BODCTRL

0x20044 - Brown-Out Detect control

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