Struct lpc43xx::emc::dynamicrrd::W
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pub struct W { /* fields omitted */ }
Value to write to the register
Methods
impl W
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pub fn reset_value() -> W
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Reset value of the register
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self
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Writes raw bits to the register
pub fn trrd(&mut self) -> _TRRDW
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Bits 0:3 - Active bank A to active bank B latency 0x0 - 0xE = n + 1 clock cycles. The delay is in EMC_CCLK cycles. 0xF = 16 clock cycles (POR reset value).